Patents by Inventor Hajime Saiki

Hajime Saiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9237656
    Abstract: Embodiments of the presently-disclosed subject matter include a first laminated structure in which at least one conductor layer and at least one resin insulating layer are alternately formed is formed on a supporting substrate, and a core substrate is formed so as to come into contact with the conductor layer which is the uppermost layer of the first laminated structure. Then, laser light is emitted to the core substrate to form a through hole and a metal layer is formed in the through hole. Then, a second laminated structure including at least one conductor layer and at least one resin insulating layer is formed on the core substrate. At that time, the thickness of the conductor layer which is the uppermost layer of the first laminated structure is greater than that of the other conductor layers.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: January 12, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Shinnosuke Maeda, Tetsuo Suzuki, Takuya Hando, Atsuhiko Sugimoto, Satoshi Hirano, Hajime Saiki
  • Patent number: 9132494
    Abstract: A wiring board and a method for manufacturing the wiring board reinforced by means of a resin is provided. Embodiments of the wiring board allow for reliable attachment of a connection member, like a socket, to a terminal member. For example, a base of terminal pins is put on pin grid array (PGA) terminal pads, and a bonding material paste including solder and an electric insulation material made of a resin is placed on each of the PGA terminal pads. The bonding material paste is then heated to fuse the solder and soften the electric insulation material. Subsequently, the bonding material paste is cooled to solidify the solder and bond each of the bases to a corresponding PGA terminal pad and form an electric insulation surface layer on an exposed surface of each of solder junctions to which the respective bases are bonded.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: September 15, 2015
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Masahiro Inoue, Hajime Saiki, Atsuhiko Sugimoto
  • Patent number: 9119333
    Abstract: A multilayer wiring board including a build-up layer, formed from one or more conductor and resin insulation layers that are layered one on top of the other, having conductive pads formed on a surface of at least one resin insulation layer so as to project from the surface are provided. The conductive pads may each include a columnar portion situated at a lower part thereof and a convex portion situated at a higher part thereof, wherein a surface of the convex portion may assume a continual curved shape. A solder layer may be formed over an upper surface of the conductive pads. Certain embodiments make it possible to minimize or eliminate the concentration of stress on the conductive pads, and may inhibit the occurrence of defective connections to a semiconductor element and infliction of damage to the conductive pads.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: August 25, 2015
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takuya Hando, Masahiro Inoue, Hajime Saiki, Atsuhiko Sugimoto, Hidetoshi Wada
  • Patent number: 9006580
    Abstract: Disclosed is a method of manufacturing a multilayer wiring substrate having a principal plane of the substrate and a rear plane thereof, having a structure such that a plurality of resin insulating layers and a plurality of conductor layers are laminated, and a plurality of chip component connecting terminals to which chip components are connectable are disposed on the principal plane of the substrate. This method has a feature including a plating layer forming process in which product plating layers which provide the plurality of chip component connecting terminals and a dummy plating layer on the surrounding of the product plating layers are formed on the surface of an exposed outermost resin insulating layer at the principal plane of the substrate. This method permits a thickness dispersion of the chip component connecting terminals to be suppressed and permits a connection reliability thereof to the chip components to be increased.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: April 14, 2015
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Shinnosuke Maeda, Hajime Saiki, Satoshi Hirano
  • Patent number: 8937256
    Abstract: A method for manufacturing a wiring board for mounting an electronic component, a wiring board for mounting an electronic component, and a method for manufacturing an electronic-component-mounted wiring board are provided. A bonding material paste, which can include solder and an electric insulation material made of a resin, can be placed on chip mount terminal pads and heated to fuse the solder and soften the electric insulation material. Subsequently, the solder is solidified to form solder bumps. Further, the electric insulation material is cured on a surface of each of the solder bumps and a surface of a multilayer board around each of the solder bumps to form an electric insulation surface layer. Accordingly, when a chip is mounted to such wiring boards, the electric insulation surface layer minimizes or eliminates the connection between adjacent solder bumps during re-fusing of the solder.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: January 20, 2015
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Masahiro Inoue, Hajime Saiki, Atsuhiko Sugimoto
  • Patent number: 8866025
    Abstract: A multilayer wiring board including a build-up layer comprising a conductor layer and a resin insulation layer that are alternately layered, conductive pads formed on a surface of a resin insulation layer so as to project from the surface, and a solder layer formed over an upper surface of each of the conductive pads is provided. The upper surface of the conductive pads may have a recess, and the entire surface of the solder layer may be situated at an elevated position with respect to an outer periphery portion of the upper surface.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: October 21, 2014
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Masahiro Inoue, Hajime Saiki, Atsuhiko Sugimoto, Takuya Hando, Hidetoshi Wada
  • Publication number: 20120312590
    Abstract: Disclosed is a method of manufacturing a multilayer wiring substrate having a principal plane of the substrate and a rear plane thereof, having a structure such that a plurality of resin insulating layers and a plurality of conductor layers are laminated, and a plurality of chip component connecting terminals to which chip components are connectable are disposed on the principal plane of the substrate. This method has a feature including a plating layer forming process in which product plating layers which provide the plurality of chip component connecting terminals and a dummy plating layer on the surrounding of the product plating layers are formed on the surface of an exposed outermost resin insulating layer at the principal plane of the substrate. This method permits a thickness dispersion of the chip component connecting terminals to be suppressed and permits a connection reliability thereof to the chip components to be increased.
    Type: Application
    Filed: June 7, 2012
    Publication date: December 13, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Shinnosuke MAEDA, Hajime SAIKI, Satoshi HIRANO
  • Patent number: 8322596
    Abstract: A wiring substrate manufacturing method includes: preparing a wiring substrate including a core layer having a principal surface, a resin insulating layer and a conductor layer alternately laminated to form at least one laminated layer on the one principal surface of the core layer, a solder resist layer including opening portions and formed on an outermost surface of the at least one laminated layer such that respective portions of an outermost conductor layer are exposed from the opening portions; forming a Sn-containing underlying layer on the respective portions of the outermost conductor layer by a plating process; and fusing the Sn-containing underlying layer to the respective portions of the outermost conductor layer by a heating process, then mounting solder balls directly on respective portions of the Sn-containing underlying layer, and then connecting the solder balls to the respective portions of the Sn-containing underlying layers.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: December 4, 2012
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Takahiro Hayashi, Satoru Watanabe, Hajime Saiki, Koji Sakuma
  • Patent number: 8319111
    Abstract: A wiring board having a favorable electrical reliability and in which a crack is unlikely to occur at a connection interface of via conductors even though the number of via conductors in series, which constitutes the stacked via, becomes larger than that of a conventional wiring board.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: November 27, 2012
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hajime Saiki, Mikiya Sakurai, Atsuhiko Sugimoto
  • Publication number: 20120211271
    Abstract: A multilayer wiring board including a build-up layer, formed from one or more conductor and resin insulation layers that are layered one on top of the other, having conductive pads formed on a surface of at least one resin insulation layer so as to project from the surface are provided. The conductive pads may each include a columnar portion situated at a lower part thereof and a convex portion situated at a higher part thereof, wherein a surface of the convex portion may assume a continual curved shape. A solder layer may be formed over an upper surface of the conductive pads. Certain embodiments make it possible to minimize or eliminate the concentration of stress on the conductive pads, and may inhibit the occurrence of defective connections to a semiconductor element and infliction of damage to the conductive pads.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 23, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Takuya HANDO, Masahiro INOUE, Hajime SAIKI, Atsuhiko SUGIMOTO, Hidetoshi WADA
  • Publication number: 20120186857
    Abstract: A method for manufacturing a wiring board for mounting an electronic component, a wiring board for mounting an electronic component, and a method for manufacturing an electronic-component-mounted wiring board are provided. A bonding material paste, which can include solder and an electric insulation material made of a resin, can be placed on chip mount terminal pads and heated to fuse the solder and soften the electric insulation material. Subsequently, the solder is solidified to form solder bumps. Further, the electric insulation material is cured on a surface of each of the solder bumps and a surface of a multilayer board around each of the solder bumps to form an electric insulation surface layer. Accordingly, when a chip is mounted to such wiring boards, the electric insulation surface layer minimizes or eliminates the connection between adjacent solder bumps during re-fusing of the solder.
    Type: Application
    Filed: January 19, 2012
    Publication date: July 26, 2012
    Applicant: NGK Spark Plug Co., Inc.
    Inventors: Masahiro INOUE, Hajime SAIKI, Atsuhiko SUGIMOTO
  • Publication number: 20120186863
    Abstract: A multilayer wiring board including a build-up layer comprising a conductor layer and a resin insulation layer that are alternately layered, conductive pads formed on a surface of a resin insulation layer so as to project from the surface, and a solder layer formed over an upper surface of each of the conductive pads is provided. The upper surface of the conductive pads may have a recess, and the entire surface of the solder layer may be situated at an elevated position with respect to an outer periphery portion of the upper surface. Embodiments make it possible to feed and hold a sufficient amount of solder paste on the upper surface of conductive pads, thereby minimizing or eliminating the occurrence of defective connections to a semiconductor element and damage to the solder layer caused by an insufficient thickness of the solder layer.
    Type: Application
    Filed: January 23, 2012
    Publication date: July 26, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Masahiro INOUE, Hajime SAIKI, Atsuhiko SUGIMOTO, Takuya HANDO, Hidetoshi WADA
  • Publication number: 20120186864
    Abstract: A wiring board and a method for manufacturing the wiring board reinforced by means of a resin is provided. Embodiments of the wiring board allow for reliable attachment of a connection member, like a socket, to a terminal member. For example, a base of terminal pins is put on pin grid array (PGA) terminal pads, and a bonding material paste including solder and an electric insulation material made of a resin is placed on each of the PGA terminal pads. The bonding material paste is then heated to fuse the solder and soften the electric insulation material. Subsequently, the bonding material paste is cooled to solidify the solder and bond each of the bases to a corresponding PGA terminal pad and form an electric insulation surface layer on an exposed surface of each of solder junctions to which the respective bases are bonded.
    Type: Application
    Filed: January 19, 2012
    Publication date: July 26, 2012
    Applicant: NGK SPARK PLUG CO., INC.
    Inventors: Masahiro INOUE, Hajime SAIKI, Atsuhiko SUGIMOTO
  • Publication number: 20120111616
    Abstract: An electronic-component-mounted wiring substrate provides enhanced joining reliability when an electronic component is joined to terminal pads of the wiring substrate, has sufficient strength, and can prevent generation of warpage and formation of a short circuit, which would otherwise occur as a result of re-melting of solder. Solder completely covers an entire surface of each of the terminal pads provided on a laminated substrate such that they project therefrom, and also joins to terminals of the electronic component. Therefore, each of the terminal pads and the solder are joined together reliably, and sufficient electrical continuity is secured therebetween. That is, the reliability of a joint between the solder and each terminal pad is extremely high, and the reliability of joint between the terminal pads and the electronic component is extremely high.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 10, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Masahiro INOUE, Hajime SAIKI, Atsuhiko SUGIMOTO
  • Patent number: 8143534
    Abstract: A wiring board has a wiring board main body, a solder resist and solder bumps. The solder resist is formed on a top surface of the wiring board main body, and includes first openings, and second openings that have a diameter larger than that of the first openings. The solder bumps are disposed in the first openings and in the second openings. In addition, top portions of the solder bumps disposed in the first openings have a flat face, while top portions of the solder bumps disposed in the second openings have a non-flat face.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: March 27, 2012
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Takuya Hando, Hajime Saiki, Kazutaka Tanaka
  • Publication number: 20120048914
    Abstract: A wiring substrate manufacturing method includes: preparing a wiring substrate including a core layer having a principal surface, a resin insulating layer and a conductor layer alternately laminated to form at least one laminated layer on the one principal surface of the core layer, a solder resist layer including opening portions and formed on an outermost surface of the at least one laminated layer such that respective portions of an outermost conductor layer are exposed from the opening portions; forming a Sn-containing underlying layer on the respective portions of the outermost conductor layer by a plating process; and fusing the Sn-containing underlying layer to the respective portions of the outermost conductor layer by a heating process, then mounting solder balls directly on respective portions of the Sn-containing underlying layer, and then connecting the solder balls to the respective portions of the Sn-containing underlying layers.
    Type: Application
    Filed: August 24, 2011
    Publication date: March 1, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro HAYASHI, Satoru WATANABE, Hajime SAIKI, Koji SAKUMA
  • Publication number: 20120043371
    Abstract: A wiring substrate includes a conductor layer and a resin insulating layer stacked alternately, solder resist layers formed on outermost surfaces on a first principal surface side and an opposing second principal surface side respectively, and outermost conductor layers exposed from opening portions formed in the respective solder resist layers. A method of manufacturing the wiring substrate includes: forming a first underlying layer and a second underlying layer on the respective outermost conductor layers; supplying a first solder onto the first underlying layer, and a second solder onto the second underlying layer; and connecting the first solder to the first underlying layer and the second solder to the second underlying layer respectively, by heating the first solder and the second solder simultaneously.
    Type: Application
    Filed: August 23, 2011
    Publication date: February 23, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro HAYASHI, Satoru WATANABE, Hajime SAIKI, Koji SAKUMA
  • Patent number: 7808799
    Abstract: A wiring board having an excellent electrical property and reliability or the like. The wiring board includes a core board, a capacitor and a resin filler. The core board includes an accommodation hole therein and a core board main surface side conductor disposed on the core main surface thereof. A capacitor main surface side electrode is disposed on a capacitor main surface of the capacitor. A gap between the capacitor accommodated in the accommodation hole and the core board is filled with the resin filler so that the capacitor is fixed to the core board. Further, the resin filler has a main surface side wiring forming portion on which a main surface side connecting conductor, which is connected to an end portion of a via conductor, is disposed so as to connect the core board main surface side conductor to the capacitor main surface side electrode.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: October 5, 2010
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Tadahiko Kawabe, Masao Kuroda, Yasuhiro Sugimoto, Hajime Saiki, Shinji Yuri, Makoto Origuchi
  • Patent number: 7704548
    Abstract: A method for manufacturing a wiring board which can simplify a manufacturing step. In a preparation step, a core board and an electronic component are prepared. In an insulating layer formation and fixing step, after accommodating the electronic component in an accommodation hole, a lowermost resin insulating layer is formed, and a gap between the electronic component and the core board is filled with a part of the lowermost resin insulating layer so as to fix the electronic component to the core board. In an opening portion formation step, a portion of the lowermost resin insulating layer located directly above the gap between the electronic component and the core board is removed so as to form an opening portion exposing a part of a core board main surface side conductor and a component main surface side electrode.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: April 27, 2010
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Tadahiko Kawabe, Masao Kuroda, Yasuhiro Sugimoto, Hajime Saiki, Shinji Yuri, Makoto Origuchi
  • Patent number: 7692103
    Abstract: A wiring substrate includes a lower insulating resin layer; wiring pattern layers provided on surfaces of the lower insulating resin layer; upper insulating resin layers; and via holes and via conductors connected electrically with at least one of the wiring pattern layers. An upper insulating resin layer includes an epoxy resin containing 30 to 50% by weight of an inorganic filler of SiO2 having an average grain diameter of 1.0 to 10.0 ?m, and a via having a lower end opening diameter of between 40 ?m and 60 ?m.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: April 6, 2010
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hajime Saiki, Mikiya Sakurai