Abstract: To improve the performance of a semiconductor device having an IGBT. A p+-type collector layer is formed on the back surface side of a semiconductor substrate. A back electrode is formed over the back surface of the semiconductor substrate. Within the semiconductor substrate, an n?-type drift region is formed over the p+-type collector layer, and a first IGBT cell region and a second IGBT cell region are formed on the surface side of the semiconductor substrate. An embedded insulating film is formed on the surface side of the semiconductor substrate between the first IGBT cell region and the second IGBT cell region. An interlayer insulating film is formed over the first IGBT cell region, the second IGBT cell region, and the embedded insulating film. An emitter electrode is formed over the interlayer insulating film.

Abstract: To improve the performance of a semiconductor device having an IGBT. A p+-type collector layer is formed on the back surface side of a semiconductor substrate. A back electrode is formed over the back surface of the semiconductor substrate. Within the semiconductor substrate, an n?-type drift region is formed over the p+-type collector layer, and a first IGBT cell region and a second IGBT cell region are formed on the surface side of the semiconductor substrate. An embedded insulating film is formed on the surface side of the semiconductor substrate between the first IGBT cell region and the second IGBT cell region. An interlayer insulating film is formed over the first IGBT cell region, the second IGBT cell region, and the embedded insulating film. An emitter electrode is formed over the interlayer insulating film.

Abstract: An improvement is achieved in the reliability of a semiconductor device having an IGBT. In an active cell region, in a portion of a semiconductor substrate which is interposed between first and second trenches in which first and second trench gate electrodes are embedded, an n+-type emitter region, a p-type body region located thereunder, and a first n-type hole barrier region located thereunder are formed. In a hole collector cell region, in a portion of the semiconductor substrate which is interposed between third and fourth trenches in which third and fourth trench gate electrodes are embedded, the p-type body region and a second n-type hole barrier region located thereunder are formed, but an n-type semiconductor region equivalent to the n+-type emitter region is not formed. Under the first and second n-type hole barrier regions, an n?-type drift region having an impurity concentration lower than those thereof is present.

Abstract: An improvement is achieved in the reliability of a semiconductor device having an IGBT. In an active cell region, in a portion of a semiconductor substrate which is interposed between first and second trenches in which first and second trench gate electrodes are embedded, an n+-type emitter region, a p-type body region located thereunder, and a first n-type hole barrier region located thereunder are formed. In a hole collector cell region, in a portion of the semiconductor substrate which is interposed between third and fourth trenches in which third and fourth trench gate electrodes are embedded, the p-type body region and a second n-type hole barrier region located thereunder are formed, but an n-type semiconductor region equivalent to the n+-type emitter region is not formed. Under the first and second n-type hole barrier regions, an n?-type drift region having an impurity concentration lower than those thereof is present.