Patents by Inventor Hajime Yagi

Hajime Yagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030124755
    Abstract: A single-crystal silicon layer is formed by graphoepitaxy from a low-melting-point metal layer which contains dissolved polycrystalline or amorphous silicon, or from a melt of a silicon-containing low-melting-point metal, using step differences formed on a substrate as a seed for the epitaxial growth. This single-crystal silicon layer is used as dual-gate MOSTFTs, or bottom-gate MOSTFTs, of an electrooptical device such as an LCD integrating a display section and a peripheral-driving-circuit section. This process enables production of a uniform single-crystal silicon thin-film having high electron/hole mobility at a relatively low temperature. The display section includes LDD-nMOSTFTs or pMOSTFTs having high switching characteristics and a low leakage current. The peripheral-driving-circuit section includes cMOSTFTs, nMOSTFTs, pMOSTFTs, or a combination thereof, having high driving ability.
    Type: Application
    Filed: November 20, 2002
    Publication date: July 3, 2003
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuuichi Sato, Hajime Yagi
  • Publication number: 20030071309
    Abstract: Single crystal silicon is graphoepitaxially grown using a step formed on a substrate as a seed by a catalyst PVD process or the like, and the obtained single crystal silicon layer is used for a dual gate type MOSTFT in an electro-optical apparatus such as a display section-peripheral driving circuit integration type LCD.
    Type: Application
    Filed: November 22, 2002
    Publication date: April 17, 2003
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Publication number: 20030059717
    Abstract: The plate-making printing press is constructed by installing a plate-making apparatus in a printing press that supplies ink and dampening water to a printing plate and performs printing on a medium. In order to realize a high-precision plate-making operation, the printing press is equipped with a target disposed on the printing cylinder and a sensor for detecting the target and provided on the writing device, and the zero point of the encoder is corrected. Furthermore, at the time of plate-making, the adjustment mechanism is operated so that the printing cylinder is returned to the position of the point of origin.
    Type: Application
    Filed: August 19, 2002
    Publication date: March 27, 2003
    Inventors: Mitsuru Tabuchi, Hitoshi Hirose, Hiroya Nishii, Hajime Yagi, Masahiro Matsubara, Hiroaki Ikeda, Toshihiko Yamanaka
  • Patent number: 6521525
    Abstract: An electro-optic device, such as an LCD, includes a display unit and a peripheral drive circuit unit on a single substrate. A gate comprising a gate electrode and gate insulation film is formed on a surface of the substrate. A layer of a substance having good lattice compatibility with manocrystalline silicon is formed over the gate insulation film. A layer of monocrystalline silicon is formed over the substance layer. Manocrystalline silicon is heteroepitaxially grown by catalytic CVD or the like using a crystalline sapphire film formed on the substrate to form the monocrystalline silicon layer. The monocrystalline silican layer is used as a dual gate MOSTFT of the electro-optic device.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: February 18, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6504215
    Abstract: A single crystal silicon is graphoepitaxially grown using a step formed on a substrate as a seed by a catalyst process, and the obtained single crystal silicon layer is used for a dual gate type MOSTFT in an electro-optical apparatus such as a display section of a peripheral driving circuit integration type LCD. A single crystal silicon thin film having high electron/hole mobility is formed into a uniform film at a relatively low temperature, which enables the manufacturing of an active matrix substrate incorporated with a high-performance driver which can be used in a TFT display.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: January 7, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6492190
    Abstract: A single-crystal silicon layer is formed by graphoepitaxy from a low-melting-point metal layer which contains dissolved polycrystalline or amorphous silicon, or from a melt of a silicon-containing low-melting-point metal, using step differences formed on a substrate as a seed for the epitaxial growth. This single-crystal silicon layer is used as dual-gate MOSTFTS, or bottom-gate MOSTFTS, of an electrooptical device such as an LCD integrating a display section and a peripheral-driving-circuit section. This process enables production of a uniform single-crystal silicon thin-film having high electron/hole mobility at a relatively low temperature. The display section includes LDD-nMOSTFTs or pMOSTFTs having high switching characteristics and a low leakage current. The peripheral-driving-circuit section includes cMOSTFTs, nMOSTFTs, pMOSTFTs, or a combination thereof, having high driving ability.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: December 10, 2002
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuuichi Sato, Hajime Yagi
  • Publication number: 20020066901
    Abstract: Each of an electrooptical device and a driving substrate for the electrooptical device includes a first substrate having a display section provided with pixel electrodes and a peripheral-driving-circuit section provided on the periphery of the display section, a second substrate, and an optical material disposed between the first substrate and the second substrate A gate section including a gate electrode and a gate-insulating film is formed on one surface of the first substrate, a compound layer having high lattice matching with single-crystal silicon is formed on the surface of the first substrate, and a single-crystal silicon layer is formed on the first substrate including the compound layer and the gate section. The single-crystal silicon layer constitutes a channel region, a source region, and a drain region.
    Type: Application
    Filed: October 10, 2001
    Publication date: June 6, 2002
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Sato, Hajime Yagi
  • Patent number: 6399429
    Abstract: Single-crystal silicon is deposited on an insulating substrate (1) with a crystalline sapphire layer (50) formed thereon as a seed, to form a silicon epitaxial layer (7). P-type impurity ions are implanted into a single-crystal silicon layer, and then N-type impurity ions are implanted to make a P-channel MOS transistor portion a single-crystal silicon layer (14). In a single-crystal silicon layer (11), an N+ source region (20) and drain region (21) of an N-channel MOS transistor are formed. Thus, a silicon layer is epitaxially grown uniformly at low temperatures.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: June 4, 2002
    Assignee: Sony Corporation
    Inventors: Hisayoshi Yamoto, Hideo Yamanaka, Yuichi Satou, Hajime Yagi
  • Publication number: 20020056837
    Abstract: To form a monocrystalline silicon thin film having high electron/hole mobility uniformly at relatively low temperature, to permit manufacture of an electro-optic device such as a semiconductor device for a display using this monocrystalline silicon film, to permit manufacture of a nMOS or pMOSTFT display unit comprising an LDD having high switching performance and low leak current, and a peripheral circuit comprising a cMOS, n or pMOSTFT, or a combination thereof, of high drive performance, in a one-piece construction, thereby realizing a display panel having high image quality, fine detail, narrow frame edge, wide screen, high efficiency and large screen size wherein even a large glass substrate of relatively low strain point may be used, productivity is high, there is no need for costly equipment thereby permitting cost reductions, adjustment of threshold value is easy, and fast operation is possible due to reduction of resistance.
    Type: Application
    Filed: November 27, 2001
    Publication date: May 16, 2002
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6376340
    Abstract: Polycrystalline silicon film forming methods to improve movement of electrons and holes and thus allow the fabrication of high performance semiconductor elements is needed. In a method of the present invention, polycrystalline is formed utilizing as a material, a chemical compound comprising at least one type of impurity from among tin (Sn), germanium (Ge) and lead (Pb) and a polycrystalline silicon film doped with impurities from at least one type from among tin (Sn), germanium (Ge) and lead (Pb) thus formed. In another method, polycrystalline silicon is formed, and the polycrystalline silicon film thus obtained is afterwards then doped with an impurity consisting of at least one type from among tin (Sn), germanium (Ge) and lead (Pb).
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: April 23, 2002
    Assignee: Sony Corporation
    Inventors: Yuuichi Sato, Hisayoshi Yamoto, Hideo Yamanaka, Hajime Yagi
  • Patent number: 6372558
    Abstract: The present invention provides an active matrix substrate having a built-in high-performance driver, in which a single crystal silicon thin film having high electron/hole mobility is uniformly deposited at a relatively low temperature, and an electrooptic device such as a thin film semiconductor device for display including the active matrix substrate. The single crystal silicon thin film is deposited by hetero epitaxial growth by a catalytic CVD method or the like using a crystalline sapphire thin film formed on the substrate as a seed so that the single crystal silicon layer obtained is used for top gate type MOSTFTs of the electrooptic device such as a LED or the like in which a display region and a peripheral driving circuit region are integrated.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: April 16, 2002
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Sato, Hajime Yagi
  • Patent number: 6351010
    Abstract: Each of an electrooptical device and a driving substrate for the electrooptical device includes a first substrate having a display section provided with pixel electrodes and a peripheral-driving-circuit section provided on the periphery of the display section, a second substrate, and an optical material disposed between the first substrate and the second substrate. A gate section including a gate electrode and a gate-insulating film is formed on one surface of the first substrate, a compound layer having high lattice matching with single-crystal silicon is formed on the surface of the first substrate, and a single-crystal silicon layer is formed on the first substrate including the compound layer and the gate section. The single-crystal silicon layer constitutes a channel region, a source region, and a drain region.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: February 26, 2002
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Sato, Hajime Yagi
  • Patent number: 6346718
    Abstract: An electro-optic device, such as an LCD, includes a display unit and a peripheral drive circuit unit on a single substrate. A gate comprising a gate electrode and gate insulation film is formed on a surface of the substrate. A layer of a substance having good lattice compatibility with monocrystalline silicon is formed over the gate insulation film. A layer of monocrystalline silicon is formed over the substance layer. Monocrystalline silicon is heteroepitaxially grown by catalytic CVD or the like using a crystalline sapphire film formed on the substrate to form the monocrystalline silicon layer. The monocrystalline silicon layer is used as a dual gate MOSTFT of the electro-optic device.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: February 12, 2002
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Publication number: 20020013011
    Abstract: An electrooptical device including a first substrate including a display section having pixel electrodes and a peripheral-driving-circuit section provided on a periphery of the display section, a second substrate, and an optical material disposed between the first substrate and the second substrate is produced as follows. A material layer having a high degree of lattice matching with single-crystal silicon is formed on one face of the first substrate. A polycrystalline or amorphous silicon layer is formed on the first substrate and then a low-melting-point metal layer is formed on or under the silicon layer on the first substrate, or a low-melting-point metal layer containing silicon is formed on the first substrate having the material layer. The silicon layer or the silicon is dissolved into the low-melting-point metal layer by a heat treatment.
    Type: Application
    Filed: March 2, 2001
    Publication date: January 31, 2002
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuuichi Sato, Hajime Yagi
  • Publication number: 20020006681
    Abstract: A single-crystal silicon layer is formed by graphoepitaxy from a low-melting-point metal layer which contains dissolved polycrystalline or amorphous silicon, or from a melt of a silicon-containing low-melting-point metal, using step differences formed on a substrate as a seed for the epitaxial growth. This single-crystal silicon layer is used as dual-gate MOSTFTS, or bottom-gate MOSTFTS, of an electrooptical device such as an LCD integrating a display section and a peripheral-driving-circuit section. This process enables production of a uniform single-crystal silicon thin-film having high electron/hole mobility at a relatively low temperature. The display section includes LDD-nMOSTFTs or pMOSTFTs having high switching characteristics and a low leakage current. The peripheral-driving-circuit section includes cMOSTFTs, nMOSTFTs, pMOSTFTs, or a combination thereof, having high driving ability.
    Type: Application
    Filed: March 2, 2001
    Publication date: January 17, 2002
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuuichi Sato, Hajime Yagi
  • Patent number: 6103558
    Abstract: A single crystal silicon thin film having a high electron/hole mobility is uniformly formed at a relatively low temperature, so that production of an active matrix substrate having a built-in high performance driver and an electrooptical apparatus, such as a thin film semiconductor apparatus for display, becomes possible. A single crystal silicon layer is formed by hetero-epitaxial growth from a molten liquid layer of a low melting point metal having silicon dissolved therein by using a crystalline sapphire film formed on a substrate as a seed, and the single crystal silicon layer is used in a top gate type MOS TFT of an electrooptical apparatus, such as an LCD, in which a display part and a peripheral driving circuit are integrated.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: August 15, 2000
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Sato, Hajime Yagi
  • Patent number: 6080643
    Abstract: Disclosed is a process of forming a silicon thin film used as an active layer of a thin film transistor, which process is improved for enhancing a quality and a productivity of the silicon thin film. At a physical vapor deposition step, an amorphous silicon thin film is physically formed on a substrate in vacuum. Then, at a laser annealing step, directly after formation of the amorphous silicon thin film without the need of dehydrogenation, a laser light is irradiated to the amorphous silicon thin film, to convert the amorphous silicon thin film into a polycrystalline silicon thin film. After that, the polycrystalline silicon thin film thus converted is processed to form a thin film transistor. In the physical vapor deposition step, an amorphous silicon thin film may be formed by sputtering using a target made from a silicon crystal body or a silicon sintered body.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: June 27, 2000
    Assignee: Sony Corporation
    Inventors: Takashi Noguchi, Hajime Yagi, Yasuhiro Kanaya
  • Patent number: 5435243
    Abstract: A wetting apparatus for offset printing machines comprising a first wetting roller immersed in a pan having dampening solution, a metering roller contacting with the first wetting roller, a second wetting roller contacting with the metering roller and with a printing surface, an ink application roller contacting with the printing surface, an ink receiving roller rotatably in contact with the second wetting roller and movable toward and away from at least one of the metering roller and the ink application roller, a vibrating roller rotatably in contact with the ink application roller, and an ink transferring roller rotatably in contact with the vibrating roller and movable toward and away from the ink receiving roller.
    Type: Grant
    Filed: April 18, 1994
    Date of Patent: July 25, 1995
    Assignee: Mitsubishi Jukogyo Kabushiki Kaisha
    Inventors: Shigeo Makino, Kazuhiko Sato, Katsutoshi Okazaki, Hajime Yagi, Fumihide Kimura
  • Patent number: 4950701
    Abstract: A method for bonding two objects by means of the following two adhesives:(A) a moisture-inducible room temperature anion polymerization curing adhesive composed essentially of at least one anion polymerizable compound selected from the group consisting of an .alpha.-cyanoacrylate compound of the formula: ##STR1## wherein R is an alkyl group having from 1 to 16 carbon atoms, an alkoxyalkyl group having 2 to 16 carbon atoms, a haloalkyl group having from 1 to 16 carbon atoms, a cyanoalkyl group having from 2 to 16 carbon atoms, an aralkyl group having from 6 to 12 atoms, an acyloxyalkyl group having from 2 to 16 carbon atoms, a cycloalkyl group having from 3 to 16 carbon atoms, an alkenyl group having from 2 to 16 carbon atoms or an aryl group having from 6 to 12 carbon atoms, and a 1,1-disubstituted diene compound of the formula: ##STR2## wherein each of R.sup.1 and R.sup.
    Type: Grant
    Filed: August 8, 1988
    Date of Patent: August 21, 1990
    Assignee: Cemedine Company, Ltd.
    Inventors: Naomi Okamura, Hiroshi Aoki, Junzo Makino, Hajime Yagi, Yasuo Arai, Takashi Yamanaka
  • Patent number: 4793886
    Abstract: A method for bonding two objects by means of the following two adhesives:(A) a moisture-inducible room temperature anion polymerization curing adhesive composed essentially of at least one anion polymerizable compound selected from the group consisting of an .alpha.-cyanoacrylate compound, and a 1,1-disubstituted diene compound;and(B) a room temperature self-curing adhesive containing from 0.05 to 50% by weight of an anion polymerization accelerator, said self-curing adhesive being selected from the group consisting of (1) a room temperature moisture-curing adhesive, (2) a room temperature curing two-part type epoxy resin adhesive, and (3) a room temperature curing synthetic resin aqueous emulsion adhesive, which comprises applying said two adhesives (A) and (B) at the bonding interface of the objects so that they do not contact each other and pressing the objects to each other to bring the two adhesives in contact with each other.
    Type: Grant
    Filed: July 2, 1987
    Date of Patent: December 27, 1988
    Assignee: Cemedine Co., Ltd.
    Inventors: Naomi Okamura, Hiroshi Aoki, Junzo Makino, Hajime Yagi, Yasuo Arai, Takashi Yamanaka