Patents by Inventor Hajime Yamazaki

Hajime Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12132057
    Abstract: A semiconductor device that occupies a small area is provided. The semiconductor device includes a first transistor including a first oxide semiconductor; a second transistor including a second oxide semiconductor; a capacitor element; a first insulator; and a first conductor in contact with a source or a drain of the second transistor. The capacitor element includes a second conductor, a third conductor, and a second insulator. The first transistor, the second transistor, and the first conductor are placed to be embedded in the first insulator. The second conductor is placed in contact with a top surface of the first conductor and a top surface of a gate of the first transistor. The second insulator is placed over the second conductor and the first insulator. The third conductor is placed to cover the second conductor with the second insulator therebetween.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: October 29, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hitoshi Kunitake, Tatsuya Onuki, Hajime Kimura, Takayuki Ikeda, Shunpei Yamazaki
  • Publication number: 20240357223
    Abstract: An object is to provide a display device that makes it easy to photograph a user's face looking at a display screen, or the like, in a dark place. Another object is to provide a display device that makes it easy to check a user's face looking at a display screen, or the like, in a dark place. A display device includes a first region and a second region. The first region has a function of displaying an image of a subject. The second region has a function of illuminating a subject with light. An electronic device includes a display device and an imaging device. The display device includes a first region and a second region. The first region has a function of displaying an image of a subject that is obtained using the imaging device. The second region has a function of illuminating a subject with light.
    Type: Application
    Filed: June 27, 2024
    Publication date: October 24, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hajime Kimura
  • Patent number: 12125453
    Abstract: A display device that is suitable for increasing in size is achieved. Three or more source lines are provided for each pixel column. Video signals having the same polarity are input to adjacent source lines during one frame period. Dot inversion driving is used to reduce a flicker, crosstalk, or the like.
    Type: Grant
    Filed: August 16, 2023
    Date of Patent: October 22, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura
  • Patent number: 12125849
    Abstract: A semiconductor device with large memory capacity is provided. A semiconductor device includes first to fourth insulators, a first conductor, a second conductor, and a first semiconductor, and the first semiconductor includes a first surface and a second surface. A first side surface of the first conductor is included on the first surface of the first semiconductor, and a first side surface of the first insulator is included on a second side surface of the first conductor. The second insulator is included in a region including a second side surface and a top surface of the first insulator, a top surface of the first conductor, and the second surface of the first semiconductor. The third insulator is included on a formation surface of the second insulator, and the fourth insulator is included on a formation surface of the third insulator. The second conductor is included in a region overlapping the second surface of the first semiconductor in a region where the fourth insulator is formed.
    Type: Grant
    Filed: May 2, 2023
    Date of Patent: October 22, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura
  • Patent number: 12124707
    Abstract: A memory controller of a memory system classifies input and output commands issued by a host into a group of read commands and a group of write commands, and manages the group of read commands and the group of write commands using first and second queues, respectively. The controller continuously processes a first group of commands among the group of read commands and the group of write commands until a first time period has elapsed from a start of the continuous processing of the first group of commands. In response to the first time period having elapsed, the controller switches a process target from the first group of commands to a second group of commands that is different from the first group of commands and selected among the group of read commands and the group of write commands.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: October 22, 2024
    Assignee: Kioxia Corporation
    Inventors: Konosuke Watanabe, Hajime Yamazaki
  • Publication number: 20240347522
    Abstract: One embodiment of the present invention provides a display apparatus having an image capturing function. After a light-emitting diode is fabricated over a first substrate, the light-emitting diode is picked up and mounted over a second substrate. In addition, a light-receiving element is also picked up and mounted over the second substrate which the light-emitting diode is mounted over; a plurality of the light-emitting diodes are arranged so as to surround the light-receiving element, and the display apparatus including a light-receiving region in a gap between the light-emitting regions is achieved.
    Type: Application
    Filed: July 29, 2022
    Publication date: October 17, 2024
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA
  • Publication number: 20240310938
    Abstract: An input/output device includes a first sensor electrode and a second sensor electrode. In addition, the input/output device includes a first electrode and a second electrode which are electrodes for a display element, and a substrate sandwiched between the first sensor electrode and the second sensor electrode. The second sensor electrode is formed concurrently with the first electrode using the same material. The input/output device sensors a change in capacitance of a capacitor formed between the first sensor electrode and the second sensor electrode. Furthermore, a third sensor electrode to which a floating potential is applied may be provided to overlap with the first electrode. In the input/output device, either a liquid crystal element or a light-emitting element may be used, or both the liquid crystal element and the light-emitting element may be used.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 19, 2024
    Inventors: Hajime KIMURA, Shunpei YAMAZAKI
  • Publication number: 20240302997
    Abstract: According to one embodiment, a memory system includes a plurality of nonvolatile memory chips and a controller. The controller manages whether each of the nonvolatile memory chips is in a busy state or not. When one or more requests issued by a host are stored in at least one queue of the host, the controller identifies, from the one or more requests, a first request for a first nonvolatile memory chip that is not in the busy state. The controller executes a process in accordance with the identified first request.
    Type: Application
    Filed: March 4, 2024
    Publication date: September 12, 2024
    Applicant: Kioxia Corporation
    Inventors: Konosuke WATANABE, Shinji YONEZAWA, Eiji SUKIGARA, Mitsusato HARA, Haruka MORI, Hajime YAMAZAKI
  • Publication number: 20240284674
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.
    Type: Application
    Filed: February 26, 2024
    Publication date: August 22, 2024
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takanori MATSUZAKI, Kiyoshi KATO, Satoru OKAMOTO
  • Patent number: 12066730
    Abstract: A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.
    Type: Grant
    Filed: August 8, 2023
    Date of Patent: August 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Hideaki Kuwabara, Hajime Kimura
  • Publication number: 20240272186
    Abstract: A high-throughput automatic analyzer integrates a biochemical analysis section and a blood coagulation analysis section. The analyzer is capable of achieving a reduction in size, system cost, and lifecycle cost. The automatic analyzer includes: a reaction disk; a first reagent dispensing mechanism that dispenses a reagent to reaction cells on the reaction disk; a photometer that irradiates a reaction solution in the reaction cell with light; a reaction cell cleaning mechanism; a reaction vessel supply unit that supplies a disposable reaction vessel for mixing and reacting a sample and a reagent with each other; a second reagent dispensing mechanism that dispenses a reagent to the disposable reaction vessel; a blood coagulation time measuring section that irradiates a reaction solution in the disposable reaction vessel with light to detect transmitted or scattered light; and a sample dispensing mechanism that dispenses a sample to the reaction cell and the disposable reaction vessel.
    Type: Application
    Filed: April 25, 2024
    Publication date: August 15, 2024
    Inventors: Akihisa MAKINO, Hajime YAMAZAKI, Keiko YOSHIKAWA, Manabu ANDO, Masahiko IIJIMA
  • Publication number: 20240272735
    Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.
    Type: Application
    Filed: April 5, 2024
    Publication date: August 15, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Masami JINTYOU, Yasuharu HOSAKA, Naoto GOTO, Takahiro IGUCHI, Daisuke KUROSAKI, Junichi KOEZUKA
  • Publication number: 20240258334
    Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.
    Type: Application
    Filed: April 2, 2024
    Publication date: August 1, 2024
    Inventors: Hajime KIMURA, Atsushi UMEZAKI, Shunpei YAMAZAKI
  • Publication number: 20240260340
    Abstract: A display apparatus including a plurality of antennas overlapping with a display portion is provided. The display apparatus includes a first substrate and a second substrate each having flexibility. A conductive layer and a plurality of display elements are provided between the first substrate and the second substrate. A region where the first substrate and the second substrate overlap with each other includes a curved portion. The conductive layer including a region overlapping with the region includes a region with a curvature. The plurality of display elements are provided between the first substrate and the conductive layer. The conductive layer includes a plurality of openings. The display element includes a region overlapping with the opening. The conductive layer has a function of an antenna.
    Type: Application
    Filed: June 2, 2022
    Publication date: August 1, 2024
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA
  • Patent number: 12052853
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.
    Type: Grant
    Filed: August 11, 2023
    Date of Patent: July 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Takayuki Ikeda, Kiyoshi Kato, Yuta Endo, Junpei Sugao
  • Patent number: 12040009
    Abstract: A sense amplifier and a semiconductor device which are less likely to be influenced by a variation in transistor characteristics and their operation methods are provided. An amplifier circuit in a sense amplifier includes a first circuit and a second circuit, each including an inverter, a first transistor, a second transistor, and a capacitor. A first terminal and a second terminal of the capacitor are electrically connected to a first bit line and an input terminal of the inverter, respectively. The first transistor and the second transistor function as a switch that switches conduction and non-conduction between the input terminal and an output terminal of the inverter, and a switch that switches conduction and non-conduction between the output terminal of the inverter and the second bit line, respectively. The first circuit and the second circuit are initialized by a potential obtained when conduction is established between the input terminal and the output terminal of the inverter.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: July 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura
  • Patent number: 12000849
    Abstract: A high-throughput automatic analyzer integrates a biochemical analysis section and a blood coagulation analysis section. The analyzer is capable of achieving a reduction in size, system cost, and lifecycle cost. The automatic analyzer includes: a reaction disk; a first reagent dispensing mechanism that dispenses a reagent to reaction cells on the reaction disk; a photometer that irradiates a reaction solution in the reaction cell with light; a reaction cell cleaning mechanism; a reaction vessel supply unit that supplies a disposable reaction vessel for mixing and reacting a sample and a reagent with each other; a second reagent dispensing mechanism that dispenses a reagent to the disposable reaction vessel; a blood coagulation time measuring section that irradiates a reaction solution in the disposable reaction vessel with light to detect transmitted or scattered light; and a sample dispensing mechanism that dispenses a sample to the reaction cell and the disposable reaction vessel.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: June 4, 2024
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Akihisa Makino, Hajime Yamazaki, Keiko Yoshikawa, Manabu Ando, Masahiko Iijima
  • Publication number: 20240069747
    Abstract: A memory controller of a memory system classifies input and output commands issued by a host into a group of read commands and a group of write commands, and manages the group of read commands and the group of write commands using first and second queues, respectively. The controller continuously processes a first group of commands among the group of read commands and the group of write commands until a first time period has elapsed from a start of the continuous processing of the first group of commands. In response to the first time period having elapsed, the controller switches a process target from the first group of commands to a second group of commands that is different from the first group of commands and selected among the group of read commands and the group of write commands.
    Type: Application
    Filed: February 28, 2023
    Publication date: February 29, 2024
    Inventors: Konosuke WATANABE, Hajime YAMAZAKI
  • Patent number: 11714569
    Abstract: According to one embodiment, a storage controller is configured to control a storage device capable of, upon issuance of a predetermined command, causing a storage including a temperature sensor to perform a temperature measurement to update a temperature measurement value. The storage controller includes a timer configured to notify a timeout when an elapsed time from a last issuance of the predetermined command reaches a predetermined time, and a controller configured to, when the timeout is notified, issue to the storage a command for updating the temperature measurement value.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: August 1, 2023
    Assignee: KIOXIA CORPORATION
    Inventor: Hajime Yamazaki
  • Patent number: 11693592
    Abstract: A memory system includes a first nonvolatile memory, a first processor, and a second processor. The first processor sets a first assignment amount. The second processor performs access to the first nonvolatile memory, calculates a consumed amount which is an amount according to an operation time of the first nonvolatile memory in the access, and transmits a notification to the first processor when the consumed amount reaches the first assignment amount.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: July 4, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Takahiro Miomo, Prashob Ramachandran Nair, Hajime Yamazaki, Makoto Domon, Yasunori Nakamura