Abstract: A memory system may include: a plurality of resources; and a frequency adjuster configured to adjust operating frequencies of the plurality of resources at a predetermined adjustment timing, wherein the adjustment timing comprises at least one timing for dividing partial operation periods of at least one resource among the plurality of resources.

Abstract: A memory system may include: a plurality of resources; and a frequency adjuster configured to adjust operating frequencies of the plurality of resources at a predetermined adjustment timing, wherein the adjustment timing comprises at least one timing for dividing partial operation periods of at least one resource among the plurality of resources.

Abstract: A data storage device including a first nonvolatile memory device having a first state information transmission block, a second nonvolatile memory device having a second state information transmission block, which shares a state information line with the first state information transmission block, and a controller having a state information reception block which is suitable for transmitting a control signal for controlling the first state information transmission block and the second state information transmission block to transmit a state information frame, and sequentially receiving a first state information frame transmitted from the first state information transmission block and a second state information frame transmitted from the second state information transmission block, through the state information line.

Abstract: A memory system includes a first memory device and a second memory device suitable for outputting and receiving signals through first and second sub input/output lines, respectively, a controller suitable for outputting and receiving signals to and from the first memory device and the second memory device, through a main input/output line and a selection unit suitable for electrically coupling the main input/output line with one of the first and the second sub input/output lines, through which an activated one of the first memory and the second memory devices outputs and receives signals.

Abstract: A data storage device including a first nonvolatile memory device having a first state information transmission block, a second nonvolatile memory device having a second state information transmission block, which shares a state information line with the first state information transmission block, and a controller having a state information reception block which is suitable for transmitting a control signal for controlling the first state information transmission block and the second state information transmission block to transmit a state information frame, and sequentially receiving a first state information frame transmitted from the first state information transmission block and a second state information frame transmitted from the second state information transmission block, through the state information line.

Abstract: An image sensor with a high dynamic range is provided. The image sensor includes a semiconductor substrate, a plurality of light-receiving elements formed on the semiconductor substrate, and light-shield films formed on upper ends of some of the light-receiving elements to partially block light incident upon each of the some light-receiving elements. Hence, an image sensing device including the image sensor can detect an accurate image regardless of whether the environment is bright or dark.