Abstract: A mobile device includes a display driver integrated circuit (DDI), a display panel, and an application processor. The DDI provides an internal synchronization signal based on an internal clock signal as a synchronization signal. The application processor calculates a time offset corresponding to a difference between a real time and the internal synchronization signal, and provides the time offset to the DDI. The DDI calculates a time to be displayed based on the time offset and a current time provided from the application processor, and displays the time to be displayed in the display panel in a self clock display mode.

Abstract: An operation method of a display driver includes generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host, receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory, and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated. A time interval between the last pulse and a first pulse of the internal synchronization signal is equal to the period of the synchronization signal.

Abstract: A mobile device includes a display driver integrated circuit (DDI), a display panel, and an application processor. The DDI provides an internal synchronization signal based on an internal clock signal as a synchronization signal. The application processor calculates a time offset corresponding to a difference between a real time and the internal synchronization signal, and provides the time offset to the DDI. The DDI calculates a time to be displayed based on the time offset and a current time provided from the application processor, and displays the time to be displayed in the display panel in a self clock display mode.

Abstract: An operation method of a display driver includes generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host, receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory, and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated. A time interval between the last pulse and a first pulse of the internal synchronization signal is equal to the period of the synchronization signal.

Abstract: An operation method of a display driver includes generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host, receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory, and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated. A time interval between the last pulse and a first pulse of the internal synchronization signal is equal to the period of the synchronization signal.

Abstract: An operation method of a display driver includes generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host, receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory, and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated. A time interval between the last pulse and a first pulse of the internal synchronization signal is equal to the period of the synchronization signal.