Abstract: A first input of a modulator circuit is coupled to a current feedback terminal. An output of the modulator circuit is coupled to an input of a power stage circuit. A first input, a second input, and an output of a voltage compensation circuit are coupled to a voltage feedback terminal, a voltage reference terminal, and a compensation terminal, respectively. A first input of a summing circuit is coupled to the output of the voltage compensation circuit. An output of the summing circuit is coupled to a second input of the modulator circuit. An output of an offset generation circuit is coupled to a second input of the summing circuit. An input of a filter circuit is coupled to the output of the voltage compensation circuit. An output of the filter circuit is coupled to an input of the offset generation circuit.

Abstract: A circuit includes an input terminal, a reference voltage circuit, a comparator, a delay circuit, a conduction mode control circuit, and a switching converter controller. The input terminal is configured to receive a converter output voltage. The reference voltage circuit has an output. The comparator has a first input coupled to the input terminal, a second input coupled to the output of the reference voltage circuit, and an overvoltage output. The delay circuit has an input coupled to the overvoltage output, and a delayed overvoltage output. The conduction mode control circuit has a first input coupled to the overvoltage output, a second input coupled to the delayed overvoltage output, and a mode output. The switching converter controller has a continuous conduction mode input coupled to the mode output.

Abstract: Described embodiments include a safety disconnect circuit having a logic circuit with first, second and third logic inputs and a logic output. A latch has a latch input coupled to the logic output, a latch power input, and a latch output. A counter has a counter input coupled to the logic output, and a counter output. A switch is coupled between a fault terminal and a ground terminal, and has a switch control terminal coupled to the latch output. A first voltage supply has a first supply input and a first supply output. A second voltage supply has a second supply input and a second supply output. A multiplexer has first and second multiplexer inputs that are coupled to first and second supply outputs, respectively. The multiplexer output is coupled to the latch power input. The multiplexer control terminal is coupled to the counter output.

Abstract: An example apparatus includes: a supply terminal; fuse circuitry having a first terminal, a second terminal, and an enable terminal, the first terminal of the fuse circuitry coupled to the supply terminal; fault circuitry having an enable terminal and a fault terminal, the enable terminal coupled to the supply terminal, the fault terminal coupled to the enable terminal of the fuse circuitry; and converter circuitry having a terminal coupled to the second terminal of the fuse circuitry.

Abstract: A system includes a switching converter and a circuit coupled to the switching converter. The circuit includes monitoring circuitry and a switch coupled to the switching converter. The circuit also includes a transconductance stage having a first transconductance input, a second transconductance input, and a transconductance output, the first transconductance input coupled to the monitoring circuitry and the transconductance output coupled to the switch. Additionally, the circuit includes a resistor having a first resistor terminal and a second resistor terminal, the first resistor terminal coupled to the transconductance output and to the switch; and a capacitor having a first capacitor terminal and a second capacitor terminal, the first capacitor terminal coupled to the second resistor terminal.

Abstract: A system includes: a switching converter circuit adapted to be coupled between an input voltage source and a load; and an integrated circuit adapted to be coupled between the input voltage source and a battery and configured to charge the battery. The integrated circuit has: a monitoring circuitry adapted to be coupled to the battery and configured to detect a transient fault condition of the integrated circuit; a power stage adapted to be coupled between the input voltage source and the battery, the power stage having a power switch; and a control circuit coupled between the monitoring circuitry and the power stage, the control circuit configured to provide a control signal to adjust a conductivity of the power switch responsive to a detected transient fault condition.

Abstract: A method includes receiving, by a regulating circuit, a battery feedback parameter and producing, by an operational transconductance amplifier, a first output current at an output terminal based on the battery feedback parameter and a battery current regulation voltage. The method also includes producing, by a current source, a second current at the output terminal based on the battery feedback parameter and a reference voltage.

Abstract: A device includes an amplifier having inverting and non-inverting inputs and an output. The device includes a capacitor coupled to a first node and to ground, a resistor coupled to the first node and the amplifier output, and a first switch coupled to the first node and a current sink, which is coupled to ground. The device includes AND gate having inputs and an output coupled to control terminal of first switch. The device includes a first comparator having non-inverting and inverting inputs and an output coupled to an AND gate input; a second comparator having a non-inverting input coupled to the amplifier output, an inverting input coupled to a transistor stack, and an output coupled to an AND gate input; and a second switch coupled to the transistor stack and to a current source, the second switch having a control terminal coupled to the first comparator output.

Abstract: A switching regulator includes a first transistor having a control input and the first transistor is coupled to an input voltage terminal. The regulator includes a second transistor having a control input. The second transistor is coupled to the first transistor at a switch terminal and to a ground terminal. The regulator also includes a controller coupled to the control inputs of the first and second transistor. The controller configured is configured to cause both the first and second transistors to be off concurrently during each of multiple switching cycles for an adaptive high impedance state. The length of time of the adaptive high impedance state is inversely related to current output by the switching regulator.

Abstract: A switching regulator includes a first transistor having a control input and the first transistor is coupled to an input voltage terminal. The regulator includes a second transistor having a control input. The second transistor is coupled to the first transistor at a switch terminal and to a ground terminal. The regulator also includes a controller coupled to the control inputs of the first and second transistor. The controller configured is configured to cause both the first and second transistors to be off concurrently during each of multiple switching cycles for an adaptive high impedance state. The length of time of the adaptive high impedance state is inversely related to current output by the switching regulator.

Abstract: A switching regulator includes a first transistor having a control input and the first transistor is coupled to an input voltage terminal. The regulator includes a second transistor having a control input. The second transistor is coupled to the first transistor at a switch terminal and to a ground terminal. The regulator also includes a controller coupled to the control inputs of the first and second transistor. The controller configured is configured to cause both the first and second transistors to be off concurrently during each of multiple switching cycles for an adaptive high impedance state. The length of time of the adaptive high impedance state is inversely related to current output by the switching regulator.

Abstract: Described systems, methods, and circuitries use an interleaved multi-level converter to convert an input signal received at an input node into an output signal at an output node. In one example, a power conversion system includes a first multi-level switching circuit, a second multi-level switching circuit, and a control circuit. The first multi-level switching circuit and the second multi-level switching circuit are coupled to a switching node, the input node, and a reference node. The control circuit is configured to generate, based on the output signal, switching control signals as pulse width modulated signals having a duty cycle to control the output signal and provide the switching control signals to the first multi-level switching circuit and the second multi-level switching circuit.

Abstract: A system includes: a switching converter circuit adapted to be coupled between an input voltage source and a load; and an integrated circuit adapted to be coupled between the input voltage source and a battery and configured to charge the battery. The integrated circuit has: a monitoring circuitry adapted to be coupled to the battery and configured to detect a transient fault condition of the integrated circuit; a power stage adapted to be coupled between the input voltage source and the battery, the power stage having a power switch; and a control circuit coupled between the monitoring circuitry and the power stage, the control circuit configured to provide a control signal to adjust a conductivity of the power switch responsive to a detected transient fault condition.

Abstract: A device includes an amplifier having inverting and non-inverting inputs and an output. The device includes a capacitor coupled to a first node and to ground, a resistor coupled to the first node and the amplifier output, and a first switch coupled to the first node and a current sink, which is coupled to ground. The device includes AND gate having inputs and an output coupled to control terminal of first switch. The device includes a first comparator having non-inverting and inverting inputs and an output coupled to an AND gate input; a second comparator having a non-inverting input coupled to the amplifier output, an inverting input coupled to a transistor stack, and an output coupled to an AND gate input; and a second switch coupled to the transistor stack and to a current source, the second switch having a control terminal coupled to the first comparator output.

Abstract: An example of an apparatus includes a bias circuit having first and second bias circuit outputs. The apparatus also includes a comparator having first and second comparator inputs. The apparatus also includes a first capacitor coupled between the second comparator input and the second bias circuit output. The apparatus also includes a first switch coupled between the second comparator input and the second bias circuit output. The apparatus also includes a second switch coupled between the first bias circuit output and an input terminal, a third switch coupled between the input terminal and the first comparator input, and a fourth switch coupled between the first bias circuit output and the first comparator input. The apparatus also includes a second capacitor coupled between the first comparator input and the second bias circuit output.

Abstract: Described systems, methods, and circuitries use an interleaved multi-level converter to convert an input signal received at an input node into an output signal at an output node. In one example, a power conversion system includes a first multi-level switching circuit, a second multi-level switching circuit, and a control circuit. The first multi-level switching circuit and the second multi-level switching circuit are coupled to a switching node, the input node, and a reference node. The control circuit is configured to generate, based on the output signal, switching control signals as pulse width modulated signals having a duty cycle to control the output signal and provide the switching control signals to the first multi-level switching circuit and the second multi-level switching circuit.

Abstract: A regulated charge pump power supply is implemented with a QP regulation loop providing QP clocking to control pumping operation based on sensing output voltage using residual charge on a flying capacitor Cfly. Cfly is used not only in normal charge pumping operation as an active charge shuttle element, but also to determine/measure output voltage VOUT. Voltage sensing using measured residual charge on Cfly is accomplished by introducing a sample phase into the normal charge pumping operation—after the pump phase and before the charge phase. In the sample phase, VOUT is determined (sampled) based on the residual charge on Cfly corresponding to (Vsense=VOUT?VIN). During the sample phase, the Cfly bottom plate is connected to ground, and the Cfly top plate is sampled (such as with a sense capacitor), with the sample phase completed prior to initiating a charge phase (by connecting the Cfly top plate to VIN).

Abstract: A regulated charge pump power supply is implemented with a QP regulation loop providing QP clocking to control pumping operation based on sensing output voltage using residual charge on a flying capacitor Cfly. Cfly is used not only in normal charge pumping operation as an active charge shuttle element, but also to determine/measure output voltage VOUT. Voltage sensing using measured residual charge on Cfly is accomplished by introducing a sample phase into the normal charge pumping operation—after the pump phase and before the charge phase. In the sample phase, VOUT is determined (sampled) based on the residual charge on Cfly corresponding to (Vsense=VOUT?VIN). During the sample phase, the Cfly bottom plate is connected to ground, and the Cfly top plate is sampled (such as with a sense capacitor), with the sample phase completed prior to initiating a charge phase (by connecting the Cfly top plate to VIN).

Abstract: A low-voltage differential signal driver includes, in part, a current sourcing circuit, a current steering circuit, and a current sinking circuit. The current steering circuit steers the current generated by the current sourcing circuit in one of first and second directions to generate a positive or a negative differential output voltage. The steered current flows to the ground via the current sinking circuit. A voltage dividing circuit divides the differential output voltage so generated. A first voltage regulating circuit receives a first reference voltage and regulates the voltage of a node common to both the current steering circuit and the current sinking circuit. A second voltage regulating circuit receives a first voltage supply to regulate the voltage signal generated by the voltage dividing circuit. To track the on-resistance of the transistors disposed in the current steering circuitry, a replicating circuit receives the first voltage supply and generates the first reference voltage.