Patents by Inventor Halbert Lin
Halbert Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9502093Abstract: A spin-torque magnetoresistive memory includes array read circuits and array write circuits coupled to an array of magnetic bits. The array read circuits sample magnetic bits in the array, apply a write current pulse to the magnetic bits to set them to a first logic state, resample the magnetic bits using an additional offset current, and compare the results of sampling and resampling to determine the bit state for each magnetic bit. For each of the magnetic bits in the page having the second logic state, the array write circuits initiate a write-back, wherein the write-back includes applying a second write current pulse having opposite polarity in comparison with the first write current pulse to set the magnetic bit to the second state. A read or write operation may be received after initiation of the write-back where the write-back can be aborted for a portion of the bits in the case of a write operation.Type: GrantFiled: May 27, 2016Date of Patent: November 22, 2016Assignee: Everspin Technologies, Inc.Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Publication number: 20160276012Abstract: A spin-torque magnetoresistive memory includes array read circuits and array write circuits coupled to an array of magnetic bits. The array read circuits sample magnetic bits in the array, apply a write current pulse to the magnetic bits to set them to a first logic state, resample the magnetic bits using an additional offset current, and compare the results of sampling and resampling to determine the bit state for each magnetic bit. For each of the magnetic bits in the page having the second logic state, the array write circuits initiate a write-back, wherein the write-back includes applying a second write current pulse having opposite polarity in comparison with the first write current pulse to set the magnetic bit to the second state. A read or write operation may be received after initiation of the write-back where the write-back can be aborted for a portion of the bits in the case of a write operation.Type: ApplicationFiled: May 27, 2016Publication date: September 22, 2016Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Patent number: 9378798Abstract: A spin-torque magnetoresistive memory includes array read circuits and array write circuits coupled to an array of magnetic bits. The array read circuits sample magnetic bits in the array, apply a write current pulse to the magnetic bits to set them to a first logic state, resample the magnetic bits, and comparing the results of sampling and resampling to determine the bit state for each magnetic bit. For each of the magnetic bits in the page having the second logic state, the array write circuits initiate a write-back, wherein the write-back includes applying a second write current pulse having opposite polarity in comparison with the first write current pulse to set the magnetic bit to the second state. A read or write operation may be received after initiation of the write-back where the write-back can be aborted for a portion of the bits in the case of a write operation.Type: GrantFiled: December 16, 2015Date of Patent: June 28, 2016Assignee: Everspin Technologies, Inc.Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Publication number: 20160099039Abstract: A spin-torque magnetoresistive memory includes array read circuits and array write circuits coupled to an array of magnetic bits. The array read circuits sample magnetic bits in the array, apply a write current pulse to the magnetic bits to set them to a first logic state, resample the magnetic bits, and comparing the results of sampling and resampling to determine the bit state for each magnetic bit. For each of the magnetic bits in the page having the second logic state, the array write circuits initiate a write-back, wherein the write-back includes applying a second write current pulse having opposite polarity in comparison with the first write current pulse to set the magnetic bit to the second state. A read or write operation may be received after initiation of the write-back where the write-back can be aborted for a portion of the bits in the case of a write operation.Type: ApplicationFiled: December 16, 2015Publication date: April 7, 2016Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Patent number: 9245611Abstract: A method includes sampling magnetic bits, applying a write current pulse to the magnetic bits to set them to a first logic state, resampling the magnetic bits, and comparing the results of sampling and resampling to determine the bit state for each magnetic bit. A read or write operation may be received after initiation of writing back magnetic bits having the second state, where the write-back can be aborted for a portion of the bits in the case of a write operation. The write-back may be performed such that different portions of the magnetic bits are written back at different times, thereby staggering the write-back current pulses in time. An offset current may also be used during resampling.Type: GrantFiled: May 4, 2015Date of Patent: January 26, 2016Assignee: Everspin Technologies, Inc.Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Publication number: 20150243337Abstract: A method includes sampling magnetic bits, applying a write current pulse to the magnetic bits to set them to a first logic state, resampling the magnetic bits, and comparing the results of sampling and resampling to determine the bit state for each magnetic bit. A read or write operation may be received after initiation of writing back magnetic bits having the second state, where the write-back can be aborted for a portion of the bits in the case of a write operation. The write-back may be performed such that different portions of the magnetic bits are written back at different times, thereby staggering the write-back current pulses in time. An offset current may also be used during resampling.Type: ApplicationFiled: May 4, 2015Publication date: August 27, 2015Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Patent number: 9047969Abstract: A method includes destructively reading bits of a spin torque magnetic random access memory and immediately writing back the original or inverted values. A detection of the majority state of the write back bits and a conditional inversion of write back bits are employed to reduce the number of write back pulses. A subsequent write command received within a specified time or before an original write operation is commenced will cause a portion of the write back pulses or the original write operation pulses to abort. Write pulses during subsequent write operations will follow the conditional inversion determined for the write back bits during destructive read.Type: GrantFiled: August 5, 2014Date of Patent: June 2, 2015Assignee: Everspin Technologies, Inc.Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Publication number: 20150006997Abstract: A method includes destructively reading bits of a spin torque magnetic random access memory and immediately writing back the original or inverted values. A detection of the majority state of the write back bits and a conditional inversion of write back bits are employed to reduce the number of write back pulses. A subsequent write command received within a specified time or before an original write operation is commenced will cause a portion of the write back pulses or the original write operation pulses to abort. Write pulses during subsequent write operations will follow the conditional inversion determined for the write back bits during destructive read.Type: ApplicationFiled: August 5, 2014Publication date: January 1, 2015Applicant: EVERSPIN TECHNOLOGIES, INC.Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Patent number: 8811071Abstract: A method includes destructively reading bits of a spin torque magnetic random access memory and immediately writing back the original or inverted values. A detection of the majority state of the write back bits and a conditional inversion of write back bits are employed to reduce the number of write back pulses. A subsequent write command received within a specified time or before an original write operation is commenced will cause a portion of the write back pulses or the original write operation pulses to abort. Write pulses during subsequent write operations will follow the conditional inversion determined for the write back bits during destructive read.Type: GrantFiled: January 31, 2012Date of Patent: August 19, 2014Assignee: EverSpin Technologies, Inc.Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Publication number: 20120195112Abstract: A method includes destructively reading bits of a spin torque magnetic random access memory and immediately writing back the original or inverted values. A detection of the majority state of the write back bits and a conditional inversion of write back bits are employed to reduce the number of write back pulses. A subsequent write command received within a specified time or before an original write operation is commenced will cause a portion of the write back pulses or the original write operation pulses to abort. Write pulses during subsequent write operations will follow the conditional inversion determined for the write back bits during destructive read.Type: ApplicationFiled: January 31, 2012Publication date: August 2, 2012Applicant: EVERSPIN TECHNOLOGIES, INC.Inventors: Syed M. Alam, Thomas Andre, Matthew R. Croft, Chitra Subramanian, Halbert Lin
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Patent number: 6842365Abstract: A write driver uses a reference current that is reflected to a driver circuit by a voltage. The driver circuit is sized in relation to the device that provides the voltage so that the current through the driver is a predetermined multiple of the reference current. This voltage is coupled to the driver circuit through a switch. The switch is controlled so that the driver circuit only receives the voltage when the write line is to have write current through it as determined by a decoder responsive to an address. The driver is affirmatively disabled when the write line is intended to not have current passing through it. As an enhancement to overcome ground bounce due to high currents, the input to the driver can be capacitively coupled to the ground terminal that experiences such bounce. Additional enhancements provide benefits in amplitude and edge rate control.Type: GrantFiled: September 5, 2003Date of Patent: January 11, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Joseph J. Nahas, Thomas W. Andre, Chitra K. Subramanian, Halbert Lin