Patents by Inventor Hameed Naseem

Hameed Naseem has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160189958
    Abstract: Heteroepitaxial methods are described herein for the growth of germanium-tin alloy layers directly on silicon substrates. A method of heteroeptiaxial growth of a germanium-tin alloy layer comprises placing a silicon substrate in a cold wall ultra-high vacuum chemcial vapor deposition chamber and depositing the germanium-tin alloy layer directly on the silicon substrate from a gaseous mixture in the deposition chamber, the gaseous mixture comprising a germanium source and a tin source.
    Type: Application
    Filed: December 30, 2015
    Publication date: June 30, 2016
    Inventors: Aboozar MOSLEH, Shui-Qing YU, Hameed A. NASEEM, Murtadha ALHER, Larry C. COUSAR
  • Patent number: 9087694
    Abstract: A seed layer structure is annealed. The seed layer structure comprises a crystallization catalyst material on a seed semiconductor over a substrate. The seed semiconductor comprises an amorphous portion. Annealing of the seed layer structure converts the amorphous portion into a crystalline portion. The crystalline portion is connected to the substrate by subsurface crystal legs. The crystallization catalyst material formed underneath the crystalline portion by annealing is removed from the underneath of the crystalline portion.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: July 21, 2015
    Assignees: Silicon Solar Solutions, LLC, Board of Trustees of the University of Arkansas
    Inventors: Douglas Arthur Hutchings, Seth Daniel Shumate, Hameed Naseem
  • Publication number: 20140159042
    Abstract: Certain aspects of the present disclosure are directed to a method that includes: depositing, in a deposition environment, an amorphous semiconductor material on a substrate to form a semiconductor film on the substrate; filling, in the depositing process, the deposition environment with a first precursor material such that the semiconductor film formed on the substrate includes a first layer having a first material characteristic; filling, in the depositing process, the deposition environment with a crystallization-stop precursor material such that the silicon film includes a crystallization-stop layer having a crystallization characteristic different from a crystallization characteristic of the first layer; depositing a metal film on the semiconductor film; and annealing the semiconductor film and the metal film at an predetermined annealing temperature for a predetermined period of time such that the first layer is at least partially crystallized and the crystallization-stop layer is at least partially amo
    Type: Application
    Filed: March 2, 2012
    Publication date: June 12, 2014
    Applicants: SILICON SOLAR SOLUTIONS, LLC, BOARD OF TRUSTEES OF THE UNIVERSITY OF ARKANSAS
    Inventors: Douglas Arthur Hutchings, Seth Daniel Shumate, Hameed Naseem
  • Publication number: 20130320342
    Abstract: A seed layer structure is annealed. The seed layer structure comprises a crystallization catalyst material on a seed semiconductor over a substrate. The seed semiconductor comprises an amorphous portion. Annealing of the seed layer structure converts the amorphous portion into a crystalline portion. The crystalline portion is connected to the substrate by subsurface crystal legs. The crystallization catalyst material formed underneath the crystalline portion by annealing is removed from the underneath of the crystalline portion.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 5, 2013
    Inventors: Douglas Arthur Hutchings, Seth Daniel Shumate, Hameed Naseem
  • Publication number: 20130295714
    Abstract: Systems and methods for site controlled crystallization are disclosed. According to one aspect, a method for forming a composite film is disclosed. In one example embodiment, the method includes forming a layer of amorphous material. The method also includes forming a layer of metal material on each of a plurality of selected regions of the layer of amorphous material to form a structure including the layer of metal material on the layer of amorphous material, and annealing the structure to generate metal-induced crystallization at the interface of the layer of metal material and each of the selected regions of the layer of amorphous material such that crystalline structures are formed.
    Type: Application
    Filed: May 1, 2013
    Publication date: November 7, 2013
    Applicant: BOARD OF TRUSTEES OF THE UNIVERSITY OF ARKANSAS
    Inventors: Hameed Naseem, Benjamin Newton, Matthew G. Young
  • Publication number: 20130200386
    Abstract: In one aspect, crystallization of multiple layers of amorphous materials is disclosed. In one embodiment, multiple layers of amorphous materials such as amorphous silicon, silicon carbide, and/or germanium are deposited using deposition methods such as PECVD or sputtering. A layer of metal such as aluminum is deposited on the surface of the deposited amorphous materials using sputtering or evaporation, and the structure is annealed in a hydrogen environment. The structure is contained on a semiconductor substrate, glass, a flexible metal/organic film, or other type of substrate.
    Type: Application
    Filed: June 8, 2011
    Publication date: August 8, 2013
    Applicants: SILICON SOLAR SOLUTIONS, LLC, BOARD OF TRUSTEES OF THE UNIVERSITY OF ARKANSAS
    Inventors: Douglas Arthur Hutchings, Seth Daniel Shumate, Hameed Naseem, Khalil Hashim Sharif, Hafeezuddin Mohammed
  • Patent number: 7202143
    Abstract: An oxide or nitride layer is provided on an amorphous semiconductor layer prior to performing metal-induced crystallization of the semiconductor layer. The oxide or nitride layer facilitates conversion of the amorphous material into large grain polycrystalline material. Hence, a native silicon dioxide layer provided on hydrogenated amorphous silicon (a-Si:H), followed by deposited Al permits induced crystallization at temperatures far below the solid phase crystallization temperature of a-Si. Solar cells and thin film transistors can be prepared using this method.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: April 10, 2007
    Assignee: The Board of Trustees of the University of Arkansas
    Inventors: Hameed A. Naseem, Marwan Albarghouti
  • Patent number: 6844248
    Abstract: A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1×1020 dopant atoms per cm3 of silicon.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: January 18, 2005
    Assignee: The Trustees of the University of Arkansas
    Inventors: Hameed A. Naseem, M. Shahidul Haque, William D. Brown
  • Publication number: 20040106227
    Abstract: A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1×1020 dopant atoms per cm3 of silicon.
    Type: Application
    Filed: July 14, 2003
    Publication date: June 3, 2004
    Applicant: The Board of Trustees of the University of Arkansas
    Inventors: Hameed A. Naseem, M. Shahidul Haque, William D. Brown
  • Patent number: 6613653
    Abstract: A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1×1020 dopant atoms per cm3 of silicon.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: September 2, 2003
    Assignee: The Board of Trustees of the University of Arkansas
    Inventors: Hameed A. Naseem, M. Shahidul Haque, William D. Brown
  • Patent number: 6544599
    Abstract: Method and apparatus for seeding silicon substrates with diamond particles by electrostatic seeding. Method further includes either application of heat to form the particles into a layer, or chemical vapor deposition of diamond layer onto the particles. Disclosed products include silicon substrate having electrostatically affixed diamond particles, silicon substrate having particles at a density of at least 1012 particles per cm2, and silicon substrate having polycrystalline layer having nucleation density of at least 1012 particles per cm2.
    Type: Grant
    Filed: July 31, 1996
    Date of Patent: April 8, 2003
    Inventors: William D. Brown, Rajan A. Beera, Ajay P. Malshe, Hameed A. Naseem
  • Publication number: 20020055240
    Abstract: A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1×1020 dopant atoms per cm3 of silicon.
    Type: Application
    Filed: December 31, 2001
    Publication date: May 9, 2002
    Applicant: The Board of Trustees of the Univ. of Arkansas
    Inventors: Hameed A. Naseem, M. Shahidul Haque, William D. Brown
  • Patent number: 6339013
    Abstract: A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1×1020 dopant atoms per cm3 of silicon.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: January 15, 2002
    Assignee: The Board of Trustees of the University of Arkansas
    Inventors: Hameed A. Naseem, M. Shahidul Haque, William D. Brown
  • Patent number: 5873992
    Abstract: Disclosed is an electroplating method and products made therefrom, which in one embodiment includes using a current density J.sub.O, to form a conductive metal layer having a surface roughness no greater than the surface roughness of the underlying member. In another embodiment of electroplating a substrate surface having peaks and valleys, the method includes electroplating a conductive metal onto the peaks to cover the peaks with the conductive metal, and into the valleys to substantially fill the valleys with the conductive metal.
    Type: Grant
    Filed: March 24, 1997
    Date of Patent: February 23, 1999
    Assignee: The Board of Trustees of the University of Arkansas
    Inventors: John H. Glezen, Hameed A. Naseem, William D. Brown, Leonard W. Schaper, Ajay P. Malshe
  • Patent number: 5725413
    Abstract: Disclosed are polished and planarized diamond films and a method and apparatus for polishing and planarizing diamond films. The method generally includes mechanical polishing of the diamond film against a ceramic surface in the presence of a treating agent of potassium nitrate and a polishing agent of potassium hydroxide. The produced films have an average surface roughness on the order of 0.05 microns, a planarization uniformity within eight percent, and are relatively free of process-induced contaminants.
    Type: Grant
    Filed: May 6, 1994
    Date of Patent: March 10, 1998
    Assignee: Board of Trustees of the University of Arkansas
    Inventors: Ajay P. Malshe, Hameed A. Naseem, William D. Brown
  • Patent number: 5472370
    Abstract: Disclosed is a method of planarizing a diamond film which generally includes orifices in the surface. The method includes first polishing the diamond film surface to reduce the surface roughness. Next, a filler material is applied to the surface of the film to fill the orifices in the film. Finally, the film is polished to remove excess filler material and expose the diamond film surface. Also disclosed are planarized diamond films diamond substrate having a polished surface of both diamond and filler material and a variation in thickness of less than 8 percent.
    Type: Grant
    Filed: July 29, 1994
    Date of Patent: December 5, 1995
    Assignee: University of Arkansas
    Inventors: Ajay P. Malshe, William D. Brown, Hameed A. Naseem, Leonard W. Schaper