Patents by Inventor Hamid-Reza S. Bonakdar

Hamid-Reza S. Bonakdar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Register files including distributed capacitor circuit blocks
    Patent number: 9767858
    Abstract: Some embodiments include apparatuses having a first node to receive a supply voltage, a second node, a switching circuit to couple the first node to the second node and to decouple the first node from the second node, circuit blocks coupled to the second node and the switching circuit, and drivers coupled to the second node. Each of the circuit blocks includes a capacitor having a plate coupled to the second node. Each of the drivers is associated with a conductive line. The conductive line is associated with memory cells.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: September 19, 2017
    Assignee: Intel Corporation
    Inventors: Hamid-Reza S. Bonakdar, Jaydeep Kulkarni
  • REGISTER FILES INCLUDING DISTRIBUTED CAPACITOR CIRCUIT BLOCKS
    Publication number: 20170133061
    Abstract: Some embodiments include apparatuses having a first node to receive a supply voltage, a second node, a switching circuit to couple the first node to the second node and to decouple the first node from the second node, circuit blocks coupled to the second node and the switching circuit, and drivers coupled to the second node. Each of the circuit blocks includes a capacitor having a plate coupled to the second node. Each of the drivers is associated with a conductive line. The conductive line is associated with memory cells.
    Type: Application
    Filed: January 23, 2017
    Publication date: May 11, 2017
    Inventors: Hamid-Reza S. Bonakdar, Jaydeep Kulkarni
  • Register files including distributed capacitor circuit blocks
    Patent number: 9552854
    Abstract: Some embodiments include apparatuses having a first node to receive a supply voltage, a second node, a switching circuit to couple the first node to the second node and to decouple the first node from the second node, circuit blocks coupled to the second node and the switching circuit, and drivers coupled to the second node. Each of the circuit blocks includes a capacitor having a plate coupled to the second node. Each of the drivers is associated with a conductive line. The conductive line is associated with memory cells.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: January 24, 2017
    Assignee: Intel Corporation
    Inventors: Hamid-Reza S. Bonakdar, Jaydeep Kulkarni
  • Apparatus, method, and system for instantaneous cache state recovery from speculative abort/commit
    Patent number: 9274962
    Abstract: An apparatus and method is described herein for providing instantaneous, efficient cache state recover upon an end of speculative execution. Speculatively accessed entries of a cache memory are marked as speculative, which may be on a thread specific basis. Upon an end of speculation, the speculatively marked entries are transitioned in parallel by a speculative port to their appropriate, thread specific, non-speculative coherency state; these parallel transitions allow for instantaneous commit or recovery of speculative memory state.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: March 1, 2016
    Assignee: Intel Corporation
    Inventors: Prashanth Nimmala, Hamid-Reza S. Bonakdar
  • APPARATUS, METHOD, AND SYSTEM FOR INSTANTANEOUS CACHE STATE RECOVERY FROM SPECULATIVE ABORT/COMMIT
    Publication number: 20120144126
    Abstract: An apparatus and method is described herein for providing instantaneous, efficient cache state recover upon an end of speculative execution. Speculatively accessed entries of a cache memory are marked as speculative, which may be on a thread specific basis. Upon an end of speculation, the speculatively marked entries are transitioned in parallel by a speculative port to their appropriate, thread specific, non-speculative coherency state; these parallel transitions allow for instantaneous commit or recovery of speculative memory state.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 7, 2012
    Inventors: Prashanth Nimmala, Hamid-Reza S. Bonakdar