Patents by Inventor Han-Bin Kuo Liang

Han-Bin Kuo Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5939753
    Abstract: A monolithic integrated circuit die (10) is fabricated to include unilateral FETs (113, 114, 115), RF passive devices such as a double polysilicon capacitor (57), a polysilicon resistor (58), and an inductor (155), and an ESD protection device (160). A first P.sup.+ sinker (28) provides signal isolation between two FETs (113, 115) separated by the first sinker (28) and is coupled to a source region (86) of a power FET (115) via a self-aligned titanium silicide structure (96). A second P.sup.+ sinker (29) is coupled to a bottom plate (44) of the double polysilicon capacitor (57). A third P+ sinker (178) is coupled to a source region (168) of the ESD protection device (160) via another titanium silicide structure (174).
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: August 17, 1999
    Assignee: Motorola, Inc.
    Inventors: Jun Ma, Han-Bin Kuo Liang, David Quoc-Hung Ngo, Shih King Cheng, Edward T. Spears, Bruce R. Yeung