Patents by Inventor Han-bin Noh

Han-bin Noh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11727985
    Abstract: A method of operating a resistive memory device to increase a read margin includes applying a write pulse to a memory cell such that the memory cell is programmed to a target resistance state, and applying a post-write pulse to the memory cell to increase a resistance of the memory cell that is in the target resistance state, the post-write pulse being applied as a single pulse having at least n stepped voltage levels, n being an integer equal to or more than 2, and an n-th stepped voltage level of the post-write pulse is set to be lower than a minimum threshold voltage level of the target resistance state that is changed by an (n?1)-th stepped voltage level of the post-write pulse.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwang-woo Lee, Han-bin Noh, Kyu-rie Sim
  • Publication number: 20210335422
    Abstract: A method of operating a resistive memory device to increase a read margin includes applying a write pulse to a memory cell such that the memory cell is programmed to a target resistance state, and applying a post-write pulse to the memory cell to increase a resistance of the memory cell that is in the target resistance state, the post-write pulse being applied as a single pulse having at least n stepped voltage levels, n being an integer equal to or more than 2, and an n-th stepped voltage level of the post-write pulse is set to be lower than a minimum threshold voltage level of the target resistance state that is changed by an (n?1)-th stepped voltage level of the post-write pulse.
    Type: Application
    Filed: July 7, 2021
    Publication date: October 28, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kwang-woo LEE, Han-bin NOH, Kyu-rie SIM
  • Patent number: 11087840
    Abstract: A method of operating a resistive memory device to increase a read margin includes applying a write pulse to a memory cell such that the memory cell is programmed to a target resistance state, and applying a post-write pulse to the memory cell to increase a resistance of the memory cell that is in the target resistance state, the post-write pulse being applied as a single pulse having at least n stepped voltage levels, n being an integer equal to or more than 2, and an n-th stepped voltage level of the post-write pulse is set to be lower than a minimum threshold voltage level of the target resistance state that is changed by an (n?1)-th stepped voltage level of the post-write pulse.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: August 10, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kwang-woo Lee, Han-bin Noh, Kyu-rie Sim
  • Publication number: 20200118626
    Abstract: A method of operating a resistive memory device to increase a read margin includes applying a write pulse to a memory cell such that the memory cell is programmed to a target resistance state, and applying a post-write pulse to the memory cell to increase a resistance of the memory cell that is in the target resistance state, the post-write pulse being applied as a single pulse having at least n stepped voltage levels, n being an integer equal to or more than 2, and an n-th stepped voltage level of the post-write pulse is set to be lower than a minimum threshold voltage level of the target resistance state that is changed by an (n?1)-th stepped voltage level of the post-write pulse.
    Type: Application
    Filed: April 22, 2019
    Publication date: April 16, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kwang-woo LEE, Han-bin Noh, Kyu-rie Sim