Patents by Inventor Han-Chang Pan
Han-Chang Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11417948Abstract: An antenna device is provided. The antenna device includes an antenna layer, a first transparent layer, and a second transparent layer. The antenna layer is a metal mesh structure having a plurality of thru-holes, and the antenna layer includes at least one soldering region and an embedded region. The first transparent layer and the second transparent layer are respectively connected to two opposite sides of the antenna layer. The first transparent layer and the second transparent layer are connected to each other, so that the embedded region of the antenna layer is embedded in-between the first transparent layer and the second transparent layer. The second transparent layer has a hollow region corresponding in position to the at least one soldering region, so that the at least one soldering region is exposed from the hollow region.Type: GrantFiled: August 19, 2021Date of Patent: August 16, 2022Assignee: WISTRON NEWEB CORPORATIONInventors: Han-Chang Pan, Shih-Hong Chen, Chih-Lung Chen, Li-Jun Chen
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Publication number: 20220238990Abstract: An antenna device is provided. The antenna device includes an antenna layer, a first transparent layer, and a second transparent layer. The antenna layer is a metal mesh structure having a plurality of thru-holes, and the antenna layer includes at least one soldering region and an embedded region. The first transparent layer and the second transparent layer are respectively connected to two opposite sides of the antenna layer. The first transparent layer and the second transparent layer are connected to each other, so that the embedded region of the antenna layer is embedded in-between the first transparent layer and the second transparent layer. The second transparent layer has a hollow region corresponding in position to the at least one soldering region, so that the at least one soldering region is exposed from the hollow region.Type: ApplicationFiled: August 19, 2021Publication date: July 28, 2022Inventors: HAN-CHANG PAN, SHIH-HONG CHEN, CHIH-LUNG CHEN, LI-JUN CHEN
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Patent number: 10559728Abstract: A semiconductor package structure is disclosed. The package structure includes a first substrate, a second substrate on which the first substrate is disposed, and a semiconductor chip which is disposed on the first substrate. The two substrates can include two notches or two solder receiving portions. Therefore, when the package structure is disposed on the printed circuit board (PCB), the package structure will protrude less on the surface of the printed circuit board (PCB); or, the solders on the printed circuit board (PCB) will not be shifted by the package structure.Type: GrantFiled: August 27, 2018Date of Patent: February 11, 2020Assignee: Everlight Electronics Co., Ltd.Inventors: Chih-Ming Ho, Chun-Chih Liang, Ding-Hwa Cherng, Kuang-Mao Lu, Wen-Chueh Lo, Hao-Yu Yang, Chieh-Yu Kang, Han-Chang Pan
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Patent number: 10453974Abstract: The invention relates to a conductive paste comprising from 30 to 97% by weight of electrically conductive particles, from 0 to 20% by weight of a glass frit, from 3 to 70% by weight of an organic medium and from 0.1 to 67% by weight of a silicone oil, each based on the total mass of the paste, wherein the silicone oil has a boiling point or a boiling range in the range between 180° C. and 350° C. The invention further relates to a use of the conductive paste and a process for producing electrodes on a semiconductor substrate using the paste.Type: GrantFiled: February 23, 2017Date of Patent: October 22, 2019Assignee: BASF SEInventors: Markus Fiess, Han Chang Pan, Yu Lin Wang, Chia Chin Cho
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Publication number: 20190259924Abstract: A semiconductor package structure is disclosed. The package structure includes a first substrate, a second substrate on which the first substrate is disposed, and a semiconductor chip which is disposed on the first substrate. The two substrates can include two notches or two solder receiving portions. Therefore, when the package structure is disposed on the printed circuit board (PCB), the package structure will protrude less on the surface of the printed circuit board (PCB); or, the solders on the printed circuit board (PCB) will not be shifted by the package structure.Type: ApplicationFiled: August 27, 2018Publication date: August 22, 2019Applicant: Everlight Electronics Co., Ltd.Inventors: Chih-Ming Ho, Chun-Chih Liang, Ding-Hwa Cherng, Kuang-Mao Lu, Wen-Chueh Lo, Hao-Yu Yang, Chieh-Yu Kang, Han-Chang Pan
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Publication number: 20190051774Abstract: The invention relates to a conductive paste comprising from 30 to 97% by weight of electrically conductive particles, from 0 to 20% by weight of a glass fit, from 3 to 70% by weight of an organic medium and from 0.1 to 67% by weight of a silicone oil, each based on the total mass of the paste, wherein the silicone oil hasa boiling pointor a boiling rangein the range between 180° C. and 350° C. The invention further relates to a use of the conductive paste and a process for producing electrodes on a semiconductor substrate using the paste.Type: ApplicationFiled: February 23, 2017Publication date: February 14, 2019Applicant: BASF SEInventors: Markus FIESS, Han Chang PAN, Yu Lin WANG, Chia Chin CHO
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Patent number: 8236433Abstract: An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index.Type: GrantFiled: September 26, 2008Date of Patent: August 7, 2012Assignee: National Applied Research LaboratoriesInventors: Po-Kai Chiu, Wen-Hao Cho, Hung-Ping Chen, Han-Chang Pan, Chien-Nan Hsiao
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Publication number: 20090246514Abstract: An antireflection structure is provided. The antireflection structure includes a substrate layer having a substrate refractive index; a first inorganic layer disposed on the substrate layer and having a first refractive index different from the substrate refractive index, where a thickness of the first inorganic layer is in a range of 1 to 40 nm; and a second inorganic layer disposed on the first inorganic layer and having a second refractive index different from the first refractive index.Type: ApplicationFiled: September 26, 2008Publication date: October 1, 2009Applicant: National Applied Research LaboratoriesInventors: Po-Kai Chiu, Wen-Hao Cho, Hung-Ping Chen, Han-Chang Pan, Chien-Nan Hsiao
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Publication number: 20090246553Abstract: A reflective film is provided. The reflective film includes a substrate; a middle layer disposed on the substrate and mainly having a crystallized transition metal; and a metal layer disposed on the middle layer.Type: ApplicationFiled: November 14, 2008Publication date: October 1, 2009Applicant: NATIONAL APPLIED RESEARCH LABORATORIESInventors: Po-Kai Chiu, Wen-Hao Cho, Hung-Ping Chen, Han-Chang Pan, Chien-Nan Hsiao
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Publication number: 20090098307Abstract: A manufacturing method for a far-infrared irradiating substrate is provided. The manufacturing method comprises steps of providing a substrate, providing a far-infrared irradiating material and evaporating the far-infrared irradiating material to form a thin film onto the substrate. The far-infrared irradiating substrate provided by the present invention not only has a high emission coefficient of far-infrared ray, but also do not cause a potential exposure of an ionizing radiation.Type: ApplicationFiled: February 22, 2008Publication date: April 16, 2009Applicants: NATIONAL APPLIED RESEARCH LABORATORIES, TAIPEI MEDICAL UNIVERSITYInventors: Po-Kai CHIU, Wen-Hao CHO, Han-Chang PAN, Yung-Sheng LIN, Ting-Kai LEUNG
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Publication number: 20080217163Abstract: A manufacturing method for a far-infrared (FIR) substrate is provided. The manufacturing method includes steps of providing a substrate and sputtering a FIR emission material onto at least one surface of the substrate to form a thin film.Type: ApplicationFiled: January 4, 2008Publication date: September 11, 2008Applicants: NATIONAL APPLIED RESEARCH LABORATORIES, TAIPEI MEDICAL UNIVERSITYInventors: Yung-Sheng Lin, Han-Chang Pan, Chao-Te Lee, Ting-Kai Leung
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Publication number: 20060092416Abstract: The in-situ micro-spectro-sensor determines whether a leakage occurs during the plasma process by taking the advantage of detecting the target leak in gas specifically composed of 99% of nitrogen and oxygen which are four to one in ratio. Warning signals with light and sound are available. The main part is compact, small and set up is quite convenient. Non-invasive in-situ detection has no effect on in-line process, but can indeed breakthrough the in-situ leak detection barrier for plasma-based process facilities of high-tech industries such as semiconductors and opto-electronics.Type: ApplicationFiled: June 7, 2005Publication date: May 4, 2006Inventors: Jiann-Shiun Kao, Yi-Chiuen Hu, Tong-Long Fu, Han-Chang Pan, Hui-Hsiung Lin, Ping-Chung Chung