Patents by Inventor Hancheng Liang

Hancheng Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7735033
    Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: June 8, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Xisheng Zhang, Hancheng Liang, Zhihong Liu, Jianhe Guo
  • Publication number: 20080109204
    Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.
    Type: Application
    Filed: December 18, 2007
    Publication date: May 8, 2008
    Inventors: Xisheng Zhang, Hancheng Liang, Zhihong Liu, Jianhe Guo
  • Patent number: 7313770
    Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: December 25, 2007
    Assignee: Cadence Design Systems, Inc.
    Inventors: Xisheng Zhang, Hancheng Liang, Zhihong Liu, Jianhe Guo
  • Publication number: 20050114111
    Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.
    Type: Application
    Filed: December 17, 2004
    Publication date: May 26, 2005
    Inventors: Xisheng Zhang, Hancheng Liang, Zhihong Liu, Jianhe Guo
  • Patent number: 6851097
    Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: February 1, 2005
    Assignee: Cadence Design Systems, Inc.
    Inventors: Xisheng Zhang, Hancheng Liang, Zhihong Liu, Jianhe Guo
  • Patent number: 6693439
    Abstract: An exemplary system for measuring noise in a device comprises a CPU, a memory coupled to the CPU, an interface coupled to the CPU for providing instructions processed by the CPU, a control unit coupled to the interface for receiving the instructions, a preamplifier circuit coupled to the control unit for implementing the instructions, a power supply unit controlled by the control unit for providing power to the preamplifier circuit, and a device holder selectively attached to the preamplifier circuit. In an exemplary embodiment, the preamplifier circuit further comprises a plurality of filters, an amplifier circuit, a plurality of switches for switching the amplifier circuit between a voltage amplifier mode and a current amplifier mode, and a variable loading resistor.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: February 17, 2004
    Assignee: Cadence Design Systems, Inc.
    Inventors: Zhihong Liu, Kwok Kwong Hung, Hancheng Liang
  • Publication number: 20040031001
    Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.
    Type: Application
    Filed: July 9, 2003
    Publication date: February 12, 2004
    Inventors: Xisheng Zhang, Hancheng Liang, Zhihong Liu, Jianhe Guo
  • Patent number: 6618837
    Abstract: The present invention presents methods for modeling the high frequency and noise characterization of MOSFETs. The models may be readily implemented as part of a SPICE or other simulation in a design flow. In particular, this invention is capable of providing a sub-circuit representation of a MOSFET that can accurately predicate a MOSFET's low frequency, high frequency, and noise characterizations. An interface is described through which a user may simultaneously optimize all of these characterizations. Further, methods are presented for building models that can predicate the variations in MOSFETs due to manufacturing processes and generate a corresponding corner model.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: September 9, 2003
    Assignee: Cadence Design Systems, Inc.
    Inventors: Xisheng Zhang, Hancheng Liang, Zhihong Liu, Jianhe Guo