Patents by Inventor Han-Chiang Chen

Han-Chiang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220199314
    Abstract: A high-insulation multilayer planar transformer (1) includes a pair of iron cores (20) and a circuit board integration (10a). The circuit board integration (10a) is stacked between the iron cores (20) and has a through hole (100a). The circuit board integration (10a) includes a first to a third insulating layers (11a, 12a, 14a) and a first to a second coil windings (13a, 15a). The first and third insulating layers (11a, 14a) include at least two insulating plates (111a, 141a) stacked with each other respectively. The second insulating layer (12a) includes at least one insulating plate (121a). The coil winding (13a, 15a) is disposed between the adjacent insulating layers and surrounds the through hole (100a) planarly. Therefore, the reinforced insulation requirement of safety regulations may be achieved.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Inventors: Lien-Hsing CHEN, Hsiao-Hua CHI, Chun-Ping CHANG, Han-Chiang CHEN, Chia-Ti LAI, Yung-Chi CHANG
  • Patent number: 10446010
    Abstract: The present disclosure relates to a grouped multi-device anti-loss warning system with multiple warning devices categorized as one group in which the warning devices granted an identical Group ID and not divided into mater/slave devices communicate with one another; a warning message can be activated among these warning devices in which contacts are disabled for broadcasting a notification that a group member (warning device) is considered as being out-of-touch within a preset period and fulfilling an anti-loss effect by mutual reminders among warning devices in the same group.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: October 15, 2019
    Assignee: KUN SHAN UNIVERSITY
    Inventors: Ping-Tsung Wang, Han-Chiang Chen, Ming-Fang Wu
  • Publication number: 20180286214
    Abstract: The present disclosure relates to a grouped multi-device anti-loss warning system with multiple warning devices categorized as one group in which the warning devices granted an identical Group ID and not divided into mater/slave devices communicate with one another; a warning message can be activated among these warning devices in which contacts are disabled for broadcasting a notification that a group member (warning device) is considered as being out-of-touch within a preset period and fulfilling an anti-loss effect by mutual reminders among warning devices in the same group.
    Type: Application
    Filed: December 22, 2017
    Publication date: October 4, 2018
    Inventors: Ping-Tsung Wang, Han-Chiang Chen, Ming-Fang Wu
  • Publication number: 20140253444
    Abstract: A mobile communication device including a wireless communication module, a local display device, and a processing module is provided. The wireless communication module performs wireless transceiving to and from a display host machine. The local display device is equipped with a first display screen including a first control area and a second control area within the first control area. The processing module detects a first touch event in the first control area and a second touch event for moving the second control area within the first control area, transforms coordinate information of the first and second touch events into a first set and a second set of coordinates on a second display screen of the display host machine, respectively, and presents a touch operation and a cursor operation on the second display screen via the wireless communication module according the first set and second set of coordinates, respectively.
    Type: Application
    Filed: September 19, 2013
    Publication date: September 11, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yong-Hua Cheng, Han-Chiang Chen, Yi-Hung Lu, Hsiao-Hui Lee, Chin-Chen Lee
  • Patent number: 8515069
    Abstract: A method and an apparatus for encrypting/decrypting packet data of a precise time synchronization protocol and a time synchronization system are illustrated. The method is suitable for the time synchronization system using a precise time protocol. The time synchronization system includes a master node and a slave node, wherein the slave node synchronizes its time with the master node. In the method for encrypting/decrypting packet data of the precise time synchronization protocol, an encryption/decryption hardware device is disposed on the hardware protocol layer of each of the master node and the slave node. The hardware protocol layer is under the data link layer, and includes the data link layer. A synchronization message is encrypted by using the encryption/decryption hardware devices of the master node to generate a frame data, and the frame data is decrypted by using the encryption/decryption hardware devices of the slave node to obtain the synchronization message.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: August 20, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Lung-Chih Kuo, Han-Chiang Chen, Zhong-Zhen Wu
  • Patent number: 8259758
    Abstract: Provided are a network slave node and a time synchronization method using precision time protocol-like (PTP-like) in a network. The network slave node includes a packet detection unit for detecting whether the slave node receives or sends a synchronization protocol packet and recording a synchronization protocol packet receiving time and a synchronization protocol packet sending time; a hardware clock; and a control unit controlling the packet detection unit and the hardware clock. The control unit reads out the packet receiving time and the packet sending time from the packet detection unit and informs a local master node. The local master node calculates a time offset between the local master node and the slave node, and informs the control unit. The control unit adjusts the hardware clock based on the time offset so that the local master node and the slave node are time synchronized.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: September 4, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Han-Chiang Chen, Shua-Yuan Lai
  • Patent number: 8204083
    Abstract: In a communication network, a network connection apparatus accepts timing information of a grand master to achieve timing synchronization. Next, the network connection apparatus requests slave nodes to be in timing synchronization with itself to achieve the timing synchronization. Even when the grand master is removed or crashed, when a new slave node is added, or when a hack node tries to hack the communication network, the network connection apparatus still periodically requests the slave nodes to be in timing synchronization with itself so that the timing synchronization inside the communication network is not negatively affected.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: June 19, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Shua-Yuan Lai, Han-Chiang Chen
  • Publication number: 20110150005
    Abstract: Provided are a network slave node and a time synchronization method using precision time protocol-like (PTP-like) in a network. The network slave node includes a packet detection unit for detecting whether the slave node receives or sends a synchronization protocol packet and recording a synchronization protocol packet receiving time and a synchronization protocol packet sending time; a hardware clock; and a control unit controlling the packet detection unit and the hardware clock. The control unit reads out the packet receiving time and the packet sending time from the packet detection unit and informs a local master node. The local master node calculates a time offset between the local master node and the slave node, and informs the control unit. The control unit adjusts the hardware clock based on the time offset so that the local master node and the slave node are time synchronized.
    Type: Application
    Filed: June 4, 2010
    Publication date: June 23, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Han-Chiang Chen, Shua-Yuan Lai
  • Publication number: 20100153742
    Abstract: A method and an apparatus for encrypting/decrypting packet data of a precise time synchronization protocol and a time synchronization system are illustrated. The method is suitable for the time synchronization system using a precise time protocol. The time synchronization system includes a master node and a slave node, wherein the slave node synchronizes its time with the master node. In the method for encrypting/decrypting packet data of the precise time synchronization protocol, an encryption/decryption hardware device is disposed on the hardware protocol layer of each of the master node and the slave node. The hardware protocol layer is under the data link layer, and includes the data link layer. A synchronization message is encrypted by using the encryption/decryption hardware devices of the master node to generate a frame data, and the frame data is decrypted by using the encryption/decryption hardware devices of the slave node to obtain the synchronization message.
    Type: Application
    Filed: March 17, 2009
    Publication date: June 17, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Lung-Chih Kuo, Han-Chiang Chen, Zhong-Zhen Wu
  • Publication number: 20100098202
    Abstract: In a communication network, a network connection apparatus accepts timing information of a grand master to achieve timing synchronization. Next, the network connection apparatus requests slave nodes to be in timing synchronization with itself to achieve the timing synchronization. Even when the grand master is removed or crashed, when a new slave node is added, or when a hack node tries to hack the communication network, the network connection apparatus still periodically requests the slave nodes to be in timing synchronization with itself so that the timing synchronization inside the communication network is not negatively affected.
    Type: Application
    Filed: May 7, 2009
    Publication date: April 22, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shua-Yuan Lai, Han-Chiang Chen
  • Patent number: 7305337
    Abstract: The present invention includes a method for speech encoding and decoding and a design of speech coder and decoder. The characteristic of speech encoding method relies on the type of data with high compression rate after the whole speech data is compressed. The present invention is able to lower the bit rate of the original speech from 64 Kbps to 1.6 Kbps and provide a bit rate lower than the traditional compression method. It can provide good speech quality, and attain the function of storing the maximum speech data with minimum memory. As to the speech decoding method, some random noises are appropriated added into the exciting source, so that more speech characteristics can be simulated to produce various speech sounds. In addition, the present invention also discloses a coder and a decoder designed by application specific integrated circuit, and the structural design is optimized according to the software.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: December 4, 2007
    Assignee: National Cheng Kung University
    Inventors: Jhing-Fa Wang, Jia-Ching Wang, Yun-Fei Chao, Han-Chiang Chen, Ming-Chi Shih
  • Publication number: 20070022226
    Abstract: The invention relates to a direct memory access system for iSCSI. The direct memory access system comprises: a first bus interface, a second bus interface, a FIFO memory, an iSCSI CRC module and a direct memory access controller. According to the invention, the iSCSI CRC module is mounted in the direct memory access system to automatically calculate the iSCSI cyclic redundancy codes and update the digest of the iSCSI protocol data unit during directly accessing the iSCSI protocol data unit between the iSCSI protocol and the TCP/IP protocol. Therefore, the direct memory access system of the invention can reduce the loading of CPU and the latency of repeatedly reading the iSCSI protocol data unit so as to raise the speed and efficiency for processing the iSCSI cyclic redundancy codes and to reduce the reading memory time and the waiting time.
    Type: Application
    Filed: December 21, 2005
    Publication date: January 25, 2007
    Inventors: Zheng-Ji Wu, Han-Chiang Chen
  • Publication number: 20030139923
    Abstract: The present invention includes a method for speech encoding and decoding and a design of speech coder and decoder. The characteristic of speech encoding method relies on the type of data with high compression rate after the whole speech data is compressed. The present invention is able to lower the bit rate of the original speech from 64 Kbps to 1.6 Kbps and provide a bit rate lower than the traditional compression method. It can provide good speech quality, and attain the function of storing the maximum speech data with minimum memory. As to the speech decoding method, some random noises are appropriated added into the exciting source, so that more speech characteristics can be simulated to produce various speech sounds. In addition, the present invention also discloses a coder and a decoder designed by application specific integrated circuit, and the structural design is optimized according to the software.
    Type: Application
    Filed: December 24, 2002
    Publication date: July 24, 2003
    Inventors: Jhing-Fa Wang, Jia-Ching Wang, Yun-Fei Chao, Han-Chiang Chen, Ming-Chi Shih