Patents by Inventor Han Chung

Han Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948837
    Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Fu Yeh, Chin-Lung Chung, Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Ming-Han Lee
  • Patent number: 11946051
    Abstract: The present invention relates to a pharmaceutical composition for preventing or treating hypertrophic scars. The present inventors have found that the inhibition of expression of TXNDC5, PRRC1, S100A11, Galectin 1, Filamin A, eIF-5A, Annexin A2, and FABP5 can be a new target for improving and treating hypertrophic scars. In the present invention, TXNDC5-, PRRC1-, S100A11-, Galectin 1-, Filamin A-, eIF-5A-, Annexin A2-, and FABP5-specific siRNAs were constructed to determine the probability of treating the hypertrophic scars. As a result, the knockdown of the protein or a gene encoding the protein induces apoptosis in the hypertrophic scars and reduces collagen expression, which can be very useful in treating wounds.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: April 2, 2024
    Assignee: Tego Science Inc.
    Inventors: Saewha Jeon, Ho Yun Chung, Na Ra Oh, Yun Hee Kim, Jikhyon Han, Hyun Ah Moon
  • Patent number: 11944017
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Chien Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Patent number: 11938272
    Abstract: The present invention discloses a respiratory mask to connect a user and a breathing tube for receiving a first gas and releasing a second gas, so as to provide an user's respiratory system to exchange gas. It comprises a main part, an air chamber exchange part, an insert and a clamping part. The main part provides a first, second, and third openings that are communicated each other. The first opening connects to the breathing tube to receive the first gas from the breathing tube. The air chamber exchange part provides an exhaust assembly to relieve pressure according to an internal air pressure of the air chamber exchange part. The insert connects to the user's nose so as to direct the first gas to the user or direct the second gas from the user to the air chamber exchange part. The clamping part connects to the user's mouth.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: March 26, 2024
    Assignee: MACKAY MEMORIAL HOSPITAL
    Inventors: Wen-Han Chang, Shih-Yi Lee, Ren-Jei Chung, Ching-Yu Kuo
  • Publication number: 20240097011
    Abstract: A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Han-Yu LIN, Fang-Wei LEE, Kai-Tak LAM, Raghunath PUTIKAM, Tzer-Min SHEN, Li-Te LIN, Pinyen LIN, Cheng-Tzu YANG, Tzu-Li LEE, Tze-Chung LIN
  • Publication number: 20240092665
    Abstract: A method for treating wastewater containing ertriazole compounds is provided. Hypochlorous acid (HOCl) having a neutral to slightly acidic pH value is added to the wastewater containing triazole compounds for reaction, thereby effectively reacting more than 90% of triazole compounds.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 21, 2024
    Inventors: KUO-CHING LIN, YUNG-CHENG CHIANG, SHR-HAN SHIU, MENG-CHIH CHUNG, YI-SYUAN HUANG
  • Publication number: 20240099150
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Publication number: 20240086609
    Abstract: A system including a processor configured to perform generating a plurality of different layout blocks; selecting, among the plurality of layout blocks, layout blocks corresponding to a plurality of blocks in a floorplan of a circuit; combining the selected layout blocks in accordance with the floorplan into a layout of the circuit; and storing the layout of the circuit in a cell library or using the layout of the circuit to generate a layout for an integrated circuit (IC) containing the circuit. Each of the plurality of layout blocks satisfies predetermined design rules and includes at least one of a plurality of different first block options associated with a first layout feature, and at least one of a plurality of different second block options associated with a second layout feature different from the first layout feature.
    Type: Application
    Filed: February 16, 2023
    Publication date: March 14, 2024
    Inventors: Cheng-YU LIN, Chia Chun WU, Han-Chung CHANG, Chih-Liang CHEN
  • Publication number: 20240064938
    Abstract: A handheld electronic device is provided. The handheld electronic device includes a screen, a back cover, a frame, a main board, and a heat conduction structure. The frame is arranged between the screen and the back cover. The frame and the back cover define a space. The main board is arranged in the space, and includes a front surface and a back surface. The front surface faces the screen and includes a heat source. The heat conduction structure extends from the front surface to the back surface, and includes a first end and a second end opposite to each other. The first end is arranged at the heat source, and the second end extends to the back cover.
    Type: Application
    Filed: February 27, 2023
    Publication date: February 22, 2024
    Inventors: Chien-Feng CHUNG, Ching-Yuan YANG, Chih-Yao KUO, Cheng-Han CHUNG
  • Patent number: 11903169
    Abstract: The disclosure provides a portable electronic device, including: a housing, a heat dissipation component, a bracket, a cover structure, and a plurality of pivotal linkage rods. The housing includes a heat dissipation opening. The heat dissipation component is disposed in the housing and corresponds to the heat dissipation opening. The bracket is disposed in the housing and encloses the heat dissipation component. The cover structure is configured to move between a close position covering the heat dissipation opening and an open position exposing the heat dissipation opening. Each of the plurality of pivotal linkage rods is pivotally connected between the bracket and the cover structure, and is configured to be driven to rotate, to drive the cover structure to move between the close position and the open position.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: February 13, 2024
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Cheng-Han Chung, Ching-Yuan Yang, Chui-Hung Chen
  • Patent number: 11901791
    Abstract: A functional module is provided. The functional module is applied to an electronic device, and includes a housing, a functional member, and a motor assembly. Both the functional member and the motor assembly are disposed in the housing. The motor assembly includes a motor and an output shaft. The motor is configured to drive the output shaft to rotate. The output shaft protrudes from one side of the housing.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: February 13, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chia-Min Cheng, Chui-Hung Chen, Ching-Yuan Yang, Cheng-Han Chung
  • Publication number: 20240044776
    Abstract: Disclosed is a microfluidic detection device including a circuit substrate and a transparent substrate. The circuit substrate is provided with at least one first light-emitting device used to emit a detection beam, a photodetector used to receive the detection beam and send out a sensing signal, and a control circuit electrically connected to the first light-emitting device and the photodetector. The transparent substrate overlaps the circuit substrate and is provided with a microfluidic channel and a light guide structure. The light guide structure has a light incident surface disposed corresponding to the first light-emitting device and a light exiting surface disposed corresponding to the photodetector. The light guide structure extends from each of the light incident surface and the light exiting surface to the microfluidic channel and is adapted to transmit the detection beam into and out of the microfluidic channel.
    Type: Application
    Filed: November 30, 2022
    Publication date: February 8, 2024
    Applicant: AUO Corporation
    Inventors: Shu-Jiang Liu, Chun-Cheng Hung, Wen-Jen Li, Zhi-Jain Yu, Han-Chung Lai
  • Publication number: 20240038936
    Abstract: The present disclosure relates to the technical field of semiconductor manufacturing, and in particular to an LED chip and a preparation method thereof, including: a substrate, an epitaxial layer, a current blocking layer, a current spreading layer, a first P-type electrode, a first N-type electrode, a first insulation layer, a second P-type electrode, a second N-type electrode, a second insulation layer, a third P-type electrode, a third N-type electrode, a P-type pad and a N-type pad. As for the LED chip, the electrode design of the flip chip is improved and a third N-type electrode and a third P-type electrode are added. The third N-type electrode and the P-type pad have no overlap spatially, similarly, the third P-type electrode and the N-type pad have no overlap spatially.
    Type: Application
    Filed: December 15, 2021
    Publication date: February 1, 2024
    Applicant: HUAIAN AUCKSUN OPTOELECTRONICS TECHNOLOGY CO., LTD
    Inventors: Sibo WANG, Dongmei LI, Han-Chung LIAO
  • Publication number: 20240030297
    Abstract: An integrated structure of semiconductor devices having a shared contact plug includes: a first device, a second device and a shared contact plug. The first device includes a first gate having a conduction region, two spacer regions and a protection region. The two spacer regions overlay and are connected with two ends of the conductive region, respectively. The protection region overlays and is connected with the spacer region located outside a shared side of the conductive region. The second device includes a shared region, wherein the shared region is located in a semiconductor layer which is located below and outside the protection region. The shared contact plug is formed on and in contact with the conductive region and the shared region. The first gate is electrically connected with the shared region through the shared contact plug, wherein the shared contact plug overlays and is connected with the protection region.
    Type: Application
    Filed: May 9, 2023
    Publication date: January 25, 2024
    Inventors: Chin-Chin Tsai, Han-Chung Tai, Yong-Zhong Hu
  • Patent number: 11867346
    Abstract: A device for the rapid and convenient mounting of an electronic product on a supporting rack includes a holding rack, an engaging element, and a lock mechanism. A holding plate of the holding rack engages a first edge of the supporting rack, and holds the electronic product. An extension plate with first position and second position holes is connected to the holding plate, and the engaging element can pivot on the holding plate. The lock mechanism disposed on the engaging element can be selectively inserted into the first position hole and the second position hole. When the electronic product is mounted on the supporting rack, the lock mechanism is inserted into the first position hole, the holding plate is engaged with the first edge, and the engaging element is engaged to a second edge of the supporting rack.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: January 9, 2024
    Assignee: Nanning FuLian FuGui Precision Industrial Co., Ltd.
    Inventor: Wen-Han Chung
  • Publication number: 20240004033
    Abstract: A light sensor and a control method thereof are revealed. The light sensor comprises a first light-emitting element, a second light-emitting element and a light-sensing element. The first light-emitting element is used to generate a first emitting signal. The first emitting signal has an optical wavelength within a first wavelength range. The second light-emitting element is used to generate a second emitting signal. The wavelength of the second emitting signal has an optical wavelength within a second wavelength range. The first wavelength range is different from the second wavelength range. Thereby, a control circuit sequentially controls the first light-emitting element and the second light emitting-element to emit the first emitting signal and the second emitting signal.
    Type: Application
    Filed: January 24, 2023
    Publication date: January 4, 2024
    Inventors: Han-Chung Hsu, Feng-Jung Hsu
  • Publication number: 20240006530
    Abstract: A high voltage device having multi-field plates, includes: a semiconductor layer; a well; a body region; a source and a drain; a gate; a resist protection oxide region, formed on a top surface of the semiconductor layer, in connection with the top surface, and located above a drift region and in connection with the drift region; and plural field plates formed above the resist protection oxide region, wherein the plural field plates are arranged in parallel with the gate along a width direction and the plural field plates are not directly connected with one another and are arranged in parallel with one another, wherein the field plates are located above the resist protection oxide region in a vertical direction.
    Type: Application
    Filed: April 12, 2023
    Publication date: January 4, 2024
    Inventor: Han-Chung TAI
  • Publication number: 20240006634
    Abstract: A hydrogen storage system for detecting and restricting a pressure difference generated in the hydrogen storage system and a method for adjusting differential pressure therein are provided. The hydrogen storage system includes a controller that controls valves of a plurality of tanks. The controller measures pressure for each tank, measures a pipe pressure of pipe connected with the plurality of tanks, compares the pressure for each tank with the pipe pressure to determine whether differential pressure between the tank and the pipe is generated, determines whether it is expected to generate differential pressure between the tanks in an expected equilibrium temperature, when it is determined that the differential pressure between the tank and the pipe is not generated, and performs pressure equilibrium control between the tanks, when it is expected to generate the differential pressure between the tanks.
    Type: Application
    Filed: November 9, 2022
    Publication date: January 4, 2024
    Inventors: Jong Hee KIM, Jae Han CHUNG
  • Publication number: 20240002541
    Abstract: This document relates to methods and materials for treating T cell cancers. For example, a composition containing one or more bispecific molecules can be administered to a mammal having a T cell cancer to treat the mammal. For example, methods and materials for using one or more bispecific molecules to treat a mammal having a T cell cancer are provided.
    Type: Application
    Filed: December 1, 2021
    Publication date: January 4, 2024
    Inventors: Sarah DiNapoli, Jacqueline Douglass, Emily Han-Chung Hsiue, Michael S. Hwang, Kenneth W. Kinzler, Maximilian Konig, Brian J. Mog, Nickolas Papadopoulos, Andrew M. Pardoll, Suman Paul, Alexander H. Pearlman, Bert Vogelstein, Shibin Zhou
  • Publication number: 20230420498
    Abstract: A high electron mobility transistor includes: a substrate; a first gallium nitride (GaN) layer, which is formed on the substrate; a first aluminum gallium nitride (AlGaN) layer, which is formed on and in contact with the first GaN layer, wherein the first AlGaN layer has a trench; two insulation sidewalls, which are in contact with and completely overlay two inner sidewalls of the trench, respectively; a P-type GaN layer, which is formed on and in contact with the first AlGaN layer, wherein a part of the P-type GaN layer fills into the trench; a gate, which is formed on and in contact with the P-type GaN layer, and is configured to receive a gate voltage, for turning ON or OFF the enhancement HEMT; and a source and a drain, which are located outside two sides of the gate, respectively.
    Type: Application
    Filed: February 4, 2023
    Publication date: December 28, 2023
    Inventor: Han-Chung Tai