Patents by Inventor Han-Jin Lim

Han-Jin Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240357796
    Abstract: Provided is a semiconductor memory device. The semiconductor memory device includes a substrate, a channel region on the substrate, first and second source/drain regions electrically connected to the channel region, a gate electrode that extends in a first direction and is on the channel region, a conductive line that extends in a second direction intersecting the first direction and is electrically connected to the second source/drain region, and a capacitor structure electrically connected to the first source/drain region on the substrate. The capacitor structure may include a plurality of first electrodes stacked and spaced apart from each other in a third direction perpendicular to an upper surface of the substrate, a plurality of trenches extending into the plurality of first electrodes, a capacitor dielectric film that extends along side walls of each of the plurality of trenches, and a plurality of second electrodes in the plurality of trenches, respectively.
    Type: Application
    Filed: December 18, 2023
    Publication date: October 24, 2024
    Inventors: Han Jin Lim, Jin Woo Han, Ki Seok Lee
  • Patent number: 12125872
    Abstract: There is provided a semiconductor device capable of improving the performance and/or reliability of the element, by increasing the capacitance of the capacitor, using a capacitor dielectric film including a ferroelectric material and a paraelectric material. The semiconductor device includes first and second electrodes disposed to be spaced apart from each other, and a capacitor dielectric film disposed between the first electrode and the second electrode and including a first dielectric film and a second dielectric film. The first dielectric film includes one of a first monometal oxide film and a first bimetal oxide film, the first dielectric film has an orthorhombic crystal system, the second dielectric film includes a paraelectric material, and a dielectric constant of the capacitor dielectric film is greater than a dielectric constant of the second dielectric film.
    Type: Grant
    Filed: July 6, 2023
    Date of Patent: October 22, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han Jin Lim, Ki Nam Kim, Hyung Suk Jung, Kyoo Ho Jung, Ki Hyun Hwang
  • Publication number: 20240349511
    Abstract: A capacitor according to at least one embodiment may include a first electrode and a second electrode spaced apart from each other, and a dielectric layer disposed between the first electrode and the second electrode and including a ferroelectric layer and an auxiliary portion disposed in the ferroelectric layer, wherein an energy band gap Eg of the auxiliary portion may be lower than about 4.0 eV.
    Type: Application
    Filed: November 28, 2023
    Publication date: October 17, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jungmin PARK, Ji-Sung KIM, Han Jin LIM, Hyungsuk JUNG
  • Publication number: 20240285778
    Abstract: The present invention relates to a novel heterocyclic compound and a composition, for preventing or treating a cancer, an autoimmune disease, and an inflammatory disease, comprising same. The novel heterocyclic compound of the present invention is a bifunctional compound having a Bruton's tyrosine kinase (BTK) degradation function via a ubiquitin proteasome pathway, and may be utilized as a composition for preventing or treating a cancer, an autoimmune disease, and Parkinson's disease.
    Type: Application
    Filed: June 24, 2022
    Publication date: August 29, 2024
    Applicants: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY, UBIX THERAPEUTICS, INC.
    Inventors: Pil Ho KIM, Sung Yun CHO, Jae Du HA, Chi Hoon PARK, Jong Yeon HWANG, Hyun Jin KIM, Song Hee LEE, Ye Seul LIM, Han Wool KIM, Sun Mi YOO, Beom Seon SUH, Ji Youn PARK, Je Ho RYU, Jung Min AHN, Hee Jung MOON, Ho Hyun LEE
  • Patent number: 12046464
    Abstract: A substrate cleaning composition, a method of cleaning a substrate using the same, and a method of fabricating a semiconductor device using the same, the substrate cleaning composition including a styrene copolymer including a first repeating unit represented by Formula 1-1a and a second repeating unit represented by Formula 1-1b; an additive represented by Formula 2-1; and an alcoholic solvent having a solubility of 500 g/L or less in deionized water,
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: July 23, 2024
    Assignees: SAMSUNG ELECTRONICS CO., LTD., DONGJIN SEMICHEM CO., LTD.
    Inventors: Ga Young Song, Mi Hyun Park, Jong Kyoung Park, Jung Youl Lee, Hyun Jin Kim, Hyo San Lee, Han Sol Lim, Hoon Han
  • Publication number: 20230361161
    Abstract: There is provided a semiconductor device capable of improving the performance and/or reliability of the element, by increasing the capacitance of the capacitor, using a capacitor dielectric film including a ferroelectric material and a paraelectric material. The semiconductor device includes first and second electrodes disposed to be spaced apart from each other, and a capacitor dielectric film disposed between the first electrode and the second electrode and including a first dielectric film and a second dielectric film. The first dielectric film includes one of a first monometal oxide film and a first bimetal oxide film, the first dielectric film has an orthorhombic crystal system, the second dielectric film includes a paraelectric material, and a dielectric constant of the capacitor dielectric film is greater than a dielectric constant of the second dielectric film.
    Type: Application
    Filed: July 6, 2023
    Publication date: November 9, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Han Jin LIM, Ki Nam KIM, Hyung Suk JUNG, Kyoo Ho JUNG, Ki Hyun HWANG
  • Publication number: 20230352548
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.
    Type: Application
    Filed: July 7, 2023
    Publication date: November 2, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eunae CHO, Dongjin LEE, Ji Eun LEE, Kyoung-Ho JUNG, Dong Su KO, Yongsu KIM, Jiho YOO, Sung HEO, Hyun PARK, Satoru YAMADA, Moonyoung JEONG, Sungjin KIM, Gyeongsu PARK, Han Jin LIM
  • Patent number: 11735637
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eunae Cho, Dongjin Lee, Ji Eun Lee, Kyoung-Ho Jung, Dong Su Ko, Yongsu Kim, Jiho Yoo, Sung Heo, Hyun Park, Satoru Yamada, Moonyoung Jeong, Sungjin Kim, Gyeongsu Park, Han Jin Lim
  • Patent number: 11737277
    Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including interlayer insulating layers and first gate electrodes alternately stacked on each other, a semiconductor layer in an opening penetrating through the stack structure, a first dielectric layer between the semiconductor layer and the stack structure, and a lower pattern closer to the substrate than to the first gate electrodes in the stack structure, the lower pattern including a first surface facing the first dielectric layer, and a second surface facing the stack structure, the second surface defining an acute angle with the first surface, wherein the first dielectric layer includes a first portion facing the stack structure, and a second portion facing the first surface of the lower pattern, the second portion having a thickness greater than a thickness of the first portion.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Hoon Choi, Sung Gil Kim, Seulye Kim, Jung Ho Kim, Hong Suk Kim, Phil Ouk Nam, Jae Young Ahn, Han Jin Lim
  • Patent number: 11728372
    Abstract: There is provided a semiconductor device capable of improving the performance and/or reliability of the element, by increasing the capacitance of the capacitor, using a capacitor dielectric film including a ferroelectric material and a paraelectric material. The semiconductor device includes first and second electrodes disposed to be spaced apart from each other, and a capacitor dielectric film disposed between the first electrode and the second electrode and including a first dielectric film and a second dielectric film. The first dielectric film includes one of a first monometal oxide film and a first bimetal oxide film, the first dielectric film has an orthorhombic crystal system, the second dielectric film includes a paraelectric material, and a dielectric constant of the capacitor dielectric film is greater than a dielectric constant of the second dielectric film.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: August 15, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han Jin Lim, Ki Nam Kim, Hyung Suk Jung, Kyoo Ho Jung, Ki Hyun Hwang
  • Publication number: 20230225102
    Abstract: A fabricating equipment and method for a semiconductor device is provided. The fabricating equipment comprises a process chamber including an internal space, a substrate support which supports a substrate including a first film and a second film, inside the internal space, a nozzle which is placed on the substrate support and supplies a process gas, a first heater which is placed inside the substrate support and heats the substrate and a second heater which generates one of waves of a first frequency and waves of a second frequency to differentially heat the first film and the second film.
    Type: Application
    Filed: October 13, 2022
    Publication date: July 13, 2023
    Inventors: Intak JEON, Han Jin LIM
  • Publication number: 20230212749
    Abstract: A device for manufacturing a semiconductor device is provided. The device for manufacturing a semiconductor device includes a tube extending in a first direction, and defining a reaction space therein and configured to accommodate a boat that is configured to receive a plurality of substrates therein, and first and second nozzles each extending in the first direction inside the tube, and being apart from each other on a plane that is perpendicular to the first direction and parallel to upper surfaces of the substrates, wherein the first and second nozzles include a plurality of first injection ports and a plurality of first second injection ports that are configured inject different gases toward a center of the reaction space, respectively, and a plurality of second injection ports are placed in a region between a corresponding pair of adjacent ones of the plurality of first injection ports along the first direction.
    Type: Application
    Filed: December 1, 2022
    Publication date: July 6, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung Min PARK, Su Hwan Kim, Han Jin LIM
  • Publication number: 20230061185
    Abstract: A semiconductor device is provided. The semiconductor device comprises a lower electrode, a lower dielectric layer on the lower electrode, an upper electrode on the lower dielectric layer, an upper dielectric layer formed between the lower dielectric layer and the upper electrode, and an interposed electrode film formed between the lower dielectric layer and the upper dielectric layer, wherein the upper dielectric layer includes titanium oxide.
    Type: Application
    Filed: March 30, 2022
    Publication date: March 2, 2023
    Inventors: Intak JEON, Han Jin LIM, Hyung Suk JUNG, Jae Hyoung CHOI
  • Publication number: 20220336574
    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang Yeol KANG, Kyu Ho CHO, Han Jin LIM, Cheol Seong HWANG
  • Patent number: 11411069
    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: August 9, 2022
    Assignees: Samsung Electronics Co., Ltd., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Sang Yeol Kang, Kyu Ho Cho, Han Jin Lim, Cheol Seong Hwang
  • Publication number: 20220238641
    Abstract: Semiconductor devices are provided. The semiconductor devices includes a landing pad on a substrate, a lower electrode on the landing pad and connected to the landing pad, a capacitor dielectric film that is on the lower electrode and includes both a tetragonal crystal system and an orthorhombic crystal system, a first doping layer that is between the lower electrode and the capacitor dielectric film and includes a first metal, and an upper electrode on the capacitor dielectric film.
    Type: Application
    Filed: August 26, 2021
    Publication date: July 28, 2022
    Inventors: Jung Min Park, Han Jin Lim, Kyoo Ho Jung, Cheol Jin Cho
  • Publication number: 20220231117
    Abstract: There is provided a semiconductor device capable of improving the performance and/or reliability of the element, by increasing the capacitance of the capacitor, using a capacitor dielectric film including a ferroelectric material and a paraelectric material. The semiconductor device includes first and second electrodes disposed to be spaced apart from each other, and a capacitor dielectric film disposed between the first electrode and the second electrode and including a first dielectric film and a second dielectric film. The first dielectric film includes one of a first monometal oxide film and a first bimetal oxide film, the first dielectric film has an orthorhombic crystal system, the second dielectric film includes a paraelectric material, and a dielectric constant of the capacitor dielectric film is greater than a dielectric constant of the second dielectric film.
    Type: Application
    Filed: April 6, 2022
    Publication date: July 21, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Han Jin LIM, Ki Nam KIM, Hyung Suk JUNG, Kyoo Ho JUNG, Ki Hyun HWANG
  • Patent number: 11322578
    Abstract: There is provided a semiconductor device capable of improving the performance and/or reliability of the element, by increasing the capacitance of the capacitor, using a capacitor dielectric film including a ferroelectric material and a paraelectric material. The semiconductor device includes first and second electrodes disposed to be spaced apart from each other, and a capacitor dielectric film disposed between the first electrode and the second electrode and including a first dielectric film and a second dielectric film. The first dielectric film includes one of a first monometal oxide film and a first bimetal oxide film, the first dielectric film has an orthorhombic crystal system, the second dielectric film includes a paraelectric material, and a dielectric constant of the capacitor dielectric film is greater than a dielectric constant of the second dielectric film.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: May 3, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han Jin Lim, Ki Nam Kim, Hyung Suk Jung, Kyoo Ho Jung, Ki Hyun Hwang
  • Publication number: 20220068968
    Abstract: A semiconductor device includes a stack structure on a substrate, the stack structure including interlayer insulating layers and first gate electrodes alternately stacked on each other, a semiconductor layer in an opening penetrating through the stack structure, a first dielectric layer between the semiconductor layer and the stack structure, and a lower pattern closer to the substrate than to the first gate electrodes in the stack structure, the lower pattern including a first surface facing the first dielectric layer, and a second surface facing the stack structure, the second surface defining an acute angle with the first surface, wherein the first dielectric layer includes a first portion facing the stack structure, and a second portion facing the first surface of the lower pattern, the second portion having a thickness greater than a thickness of the first portion.
    Type: Application
    Filed: November 10, 2021
    Publication date: March 3, 2022
    Inventors: Ji Hoon CHOI, Sung Gil KIM, Seulye KIM, Jung Ho KIM, Hong Suk KIM, Phil Ouk NAM, Jae Young AHN, Han Jin LIM
  • Publication number: 20210376099
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.
    Type: Application
    Filed: August 12, 2021
    Publication date: December 2, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Eunae Cho, Dongjin Lee, Ji Eun Lee, Kyoung-Ho Jung, Dong Su Ko, Yongsu Kim, Jiho Yoo, Sung Heo, Hyun Park, Satoru Yamada, Moonyoung Jeong, Sungjin Kim, Gyeongsu Park, Han Jin Lim