Patents by Inventor Han Jun Lee

Han Jun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955697
    Abstract: An antenna device according to an embodiment of the present invention includes a dielectric layer, a radiator and a dummy electrode. The radiator is disposed on the upper surface of the dielectric layer. The radiator includes a first mesh structure, and the first mesh structure includes a first antenna electrode line and a second antenna electrode line which cross each other. The dummy electrode is spaced apart from the radiator by the separation region on the upper surface of the dielectric layer. The dummy electrode includes a second mesh structure, and the second mesh structure includes a first dummy electrode line and a second dummy electrode line which cross each other. A spacing distance between the first dummy electrode line and the radiator is different from a spacing distance between the second dummy electrode line and the radiator at the separation region.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: April 9, 2024
    Assignee: DONGWOO FINE-CHEM CO., LTD.
    Inventors: Young Jun Lee, Han Sub Ryu, Gi Hwan Ahn
  • Patent number: 11776642
    Abstract: A method of operating a memory device that includes a plurality of stages each having a plurality of page buffers. The method including performing a verify operation of a first program loop from among a plurality of program loops, the verify operation of the first program loop including, performing a first off-cell counting operation on a first stage of the plurality of stages based on a first sampling rate to generate a first off-cell counting result; selectively changing the first sampling rate based on the first off-cell counting result to generate a changed first sampling rate; and performing a second off-cell counting operation on a second stage of the plurality of stages based on one of the first sampling rate and the changed first sampling rate to generate a second off-cell counting result.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: October 3, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Won Yun, Han-Jun Lee
  • Patent number: 11682463
    Abstract: A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: June 20, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han Jun Lee, Seung Bum Kim, Il Han Park
  • Publication number: 20230145750
    Abstract: A nonvolatile memory may include; a first memory cell array including a first selection transistor connected to a first string selection line, a second memory cell array including a second selection transistor connected to a second string selection line and spaced apart from the first string selection line by a first cutting line, and a peripheral circuit. The peripheral circuit may provide a first program voltage to the first selection transistor, provide a second program voltage to the second selection transistor different from the first program voltage, program the first selection transistor with a first threshold voltage in response to the first program voltage, and program the second selection transistor with a second threshold voltage level greater than the first threshold voltage in response to the second program voltage.
    Type: Application
    Filed: March 28, 2022
    Publication date: May 11, 2023
    Inventors: SANG-WON PARK, WON-TAECK JUNG, HAN-JUN LEE, SU CHANG JEON
  • Patent number: 11594294
    Abstract: A method of operating a memory device that includes a plurality of stages each having a plurality of page buffers. The method including performing a verify operation of a first program loop from among a plurality of program loops, the verify operation of the first program loop including, performing a first off-cell counting operation on a first stage of the plurality of stages based on a first sampling rate to generate a first off-cell counting result; selectively changing the first sampling rate based on the first off-cell counting result to generate a changed first sampling rate; and performing a second off-cell counting operation on a second stage of the plurality of stages based on one of the first sampling rate and the changed first sampling rate to generate a second off-cell counting result.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: February 28, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-won Yun, Han-jun Lee
  • Publication number: 20220101931
    Abstract: A method of operating a memory device that includes a plurality of stages each having a plurality of page buffers. The method including performing a verify operation of a first program loop from among a plurality of program loops, the verify operation of the first program loop including, performing a first off-cell counting operation on a first stage of the plurality of stages based on a first sampling rate to generate a first off-cell counting result; selectively changing the first sampling rate based on the first off-cell counting result to generate a changed first sampling rate; and performing a second off-cell counting operation on a second stage of the plurality of stages based on one of the first sampling rate and the changed first sampling rate to generate a second off-cell counting result.
    Type: Application
    Filed: December 13, 2021
    Publication date: March 31, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-won YUN, Han-jun LEE
  • Publication number: 20220028464
    Abstract: A method of operating a memory device that includes a plurality of stages each having a plurality of page buffers. The method including performing a verify operation of a first program loop from among a plurality of program loops, the verify operation of the first program loop including, performing a first off-cell counting operation on a first stage of the plurality of stages based on a first sampling rate to generate a first off-cell counting result; selectively changing the first sampling rate based on the first off-cell counting result to generate a changed first sampling rate; and performing a second off-cell counting operation on a second stage of the plurality of stages based on one of the first sampling rate and the changed first sampling rate to generate a second off-cell counting result.
    Type: Application
    Filed: October 4, 2021
    Publication date: January 27, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-won YUN, Han-jun LEE
  • Publication number: 20210383875
    Abstract: A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 9, 2021
    Inventors: HAN JUN LEE, SEUNG BUM KIM, IL HAN PARK
  • Patent number: 11164646
    Abstract: A method of operating a memory device that includes a plurality of stages each having a plurality of page buffers. The method including performing a verify operation of a first program loop from among a plurality of program loops, the verify operation of the first program loop including, performing a first off-cell counting operation on a first stage of the plurality of stages based on a first sampling rate to generate a first off-cell counting result; selectively changing the first sampling rate based on the first off-cell counting result to generate a changed first sampling rate; and performing a second off-cell counting operation on a second stage of the plurality of stages based on one of the first sampling rate and the changed first sampling rate to generate a second off-cell counting result.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: November 2, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-won Yun, Han-jun Lee
  • Patent number: 11143983
    Abstract: A toner supplying apparatus used in an image forming apparatus is provided. The toner supply apparatus includes a plurality of toner containers, a plurality of fixing members, an operating member, and a driving force. Each of the plurality of toner containers includes a fixing recess. The plurality of fixing members are to be selectively coupled to the fixing recesses of the plurality of toner containers. The operating member is to slide with respect to the plurality of toner containers, and to operate at least one of the plurality of fixing members to separate the operated fixing members from the coupled fixing recess. The driving device is to move the operating member.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: October 12, 2021
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Jae Won Choi, Han Jun Lee
  • Patent number: 11127472
    Abstract: A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: September 21, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han Jun Lee, Seung Bum Kim, Il Han Park
  • Patent number: 11049547
    Abstract: A memory device includes multiple word lines. A method of operating the memory device includes: performing a first dummy read operation, with respect to first memory cells connected to a first word line among the word lines, by applying a dummy read voltage, having an offset level of a first level, to the first word line; determining, based on a result of the performing of the first dummy read operation, degradation of a threshold voltage distribution of the first memory cells; adjusting an offset level of the dummy read voltage as a second level, based on a result of the determining of the threshold voltage distribution; and performing a second dummy read operation with respect to second memory cells connected to a second word line among the word lines, by applying a dummy read voltage, having the offset level adjusted as the second level, to the second word line among the word lines.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: June 29, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-Jun Lee, Seung-Bum Kim, Chul-Bum Kim, Seung-Jae Lee
  • Patent number: 10910080
    Abstract: A nonvolatile memory device may include a page buffer including a plurality of latch sets that latch each page datum of selected memory cells among a plurality of memory cells according to each of read signal sets including at least one read signal, and a control logic configured to detect a degradation level of the memory cells and determine a read parameter applied to at least one of the read signal sets based on the detected degradation level.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: February 2, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Bae Bang, Seung Hwan Song, Dae Seok Byeon, Il Han Park, Hyun Jun Yoon, Han Jun Lee, Na Young Choi
  • Publication number: 20200371451
    Abstract: A toner supplying apparatus used in an image forming apparatus is provided. The toner supply apparatus includes a plurality of toner containers, a plurality of fixing members, an operating member, and a driving force. Each of the plurality of toner containers includes a fixing recess. The plurality of fixing members are to be selectively coupled to the fixing recesses of the plurality of toner containers. The operating member is to slide with respect to the plurality of toner containers, and to operate at least one of the plurality of fixing members to separate the operated fixing members from the coupled fixing recess. The driving device is to move the operating member.
    Type: Application
    Filed: October 1, 2018
    Publication date: November 26, 2020
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Jae Won CHOI, Han Jun LEE
  • Patent number: 10845752
    Abstract: Disclosed herein is an image forming apparatus. The image forming apparatus includes at least one pressing unit configured to bring the developing roller and the photoreceptor in contact with each other, an operating unit which is configured to be in an operating position during which a pressing force of the pressing unit is generated, and a standby during at which the pressing force is released, and a cover unit detachably provided to one side of the developing device and configured to guide movement of the operating unit to the operating position. By this configuration, operation of the operating unit is linked with an operation of detachment or attachment of the cover unit.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: November 24, 2020
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Wan Ho Lee, Jin Ho Park, Han Jun Lee
  • Publication number: 20200293988
    Abstract: Disclosed embodiments provide systems and methods related to providing delivery offers for use with a user interface. A method for providing delivery offers comprises receiving, from a mobile device, a request for one or more delivery tasks including a geographical area and a time frame, accessing a database storing delivery tasks, each delivery task associated with a status of fully assigned, partially assigned, or not assigned based on a comparison of a number of workers assigned to the task and a number of workers necessary to complete the task, determining which of the stored delivery tasks needing assignment have a delivery route in the received geographical area and time frame, selecting one or more delivery offers if a status of each determined delivery offers is equal to partially assigned or not assigned, and responding to the received request by transmitting the one or more selected delivery offers to the mobile device.
    Type: Application
    Filed: March 12, 2019
    Publication date: September 17, 2020
    Inventors: Erik REHN, Yoo Suk KIM, Yul Hee LEE, Hye Leen CHOI, Han Jun LEE, Hyung Geun JI
  • Publication number: 20200265908
    Abstract: A nonvolatile memory device may include a page buffer including a plurality of latch sets that latch each page datum of selected memory cells among a plurality of memory cells according to each of read signal sets including at least one read signal, and a control logic configured to detect a degradation level of the memory cells and determine a read parameter applied to at least one of the read signal sets based on the detected degradation level.
    Type: Application
    Filed: May 4, 2020
    Publication date: August 20, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin Bae BANG, Seung Hwan SONG, Dae Seok BYEON, Il Han PARK, Hyun Jun YOON, Han Jun LEE, Na Young CHOI
  • Patent number: 10734082
    Abstract: A memory device includes multiple word lines. A method of operating the memory device includes: performing a first dummy read operation, with respect to first memory cells connected to a first word line among the word lines, by applying a dummy read voltage, having an offset level of a first level, to the first word line; determining, based on a result of the performing of the first dummy read operation, degradation of a threshold voltage distribution of the first memory cells; adjusting an offset level of the dummy read voltage as a second level, based on a result of the determining of the threshold voltage distribution; and performing a second dummy read operation with respect to second memory cells connected to a second word line among the word lines, by applying a dummy read voltage, having the offset level adjusted as the second level, to the second word line among the word lines.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: August 4, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-Jun Lee, Seung-Bum Kim, Chul-Bum Kim, Seung-Jae Lee
  • Publication number: 20200202960
    Abstract: A method of operating a memory device that includes a plurality of stages each having a plurality of page buffers. The method including performing a verify operation of a first program loop from among a plurality of program loops, the verify operation of the first program loop including, performing a first off-cell counting operation on a first stage of the plurality of stages based on a first sampling rate to generate a first off-cell counting result; selectively changing the first sampling rate based on the first off-cell counting result to generate a changed first sampling rate; and performing a second off-cell counting operation on a second stage of the plurality of stages based on one of the first sampling rate and the changed first sampling rate to generate a second off-cell counting result.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 25, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-won YUN, Han-jun LEE
  • Publication number: 20200202955
    Abstract: A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 25, 2020
    Inventors: HAN JUN LEE, SEUNG BUM KIM, IL HAN PARK