Patents by Inventor Han Lee

Han Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948988
    Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, and a source/drain (S/D) region adjacent to the gate structure. The S/D region can include first and second side surfaces separated from each other. The S/D region can further include top and bottom surfaces between the first and second side surfaces. A first separation between the top and bottom surfaces can be greater than a second separation between the first and second side surfaces.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shahaji B. More, Cheng-Han Lee
  • Patent number: 11948808
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: April 2, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
  • Patent number: 11948820
    Abstract: The present invention provides a latching guide structure arranged inside a door of semiconductor carrier. The latching guide structure comprises an upper latching part, a lower latching part, at least one elastic unit and a driver. Moreover, a first guiding portion of the upper latching part is matched with a second guiding portion of the lower latching part, therefore to define the installation space for the at least one elastic unit. On the other hand, the driver simultaneously actuates an upper actuating unit of the first guiding portion and a lower actuating unit of the second guiding portion to linearly move in reverse direction therebetween. The range of the linear motion of the upper actuating unit and the lower actuating unit represents the compression or extension of the at least one elastic unit, determining to control the open/close status of the upper latching part and the lower latching part.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: April 2, 2024
    Assignee: GUDENG PRECISION INDUSTRIAL CO., LTD.
    Inventors: Ming-Chien Chiu, Chih-Ming Lin, Cheng-Han Chou, Po-Ting Lee
  • Patent number: 11948837
    Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Fu Yeh, Chin-Lung Chung, Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Ming-Han Lee
  • Patent number: 11949603
    Abstract: A network-on-chip (NoC) system includes a default communication path between a master device and a slave device, and a backup communication path between the master device and the slave device. The default communication path is configured to work in a normal operation state of the chip. The backup communication path is configured to replace the default communication path when a fault arises in the default communication path.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ravi Venugopalan, Sandeep Kumar Goel, Yun-Han Lee
  • Publication number: 20240107374
    Abstract: A method of a terminal may comprise: receiving a reference signal from a base station; generating channel information based on the reference signal; generating wavelet-transformed channel information by applying wavelet transform to the channel information; generating compressed channel information by compressing the wavelet-transformed channel information; and transmitting the compressed channel information to the base station.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 28, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Jin KWON, Han Jun PARK, An Seok LEE, Heesoo LEE, Yun Joo KIM, Hyun Seo PARK, Jung Bo SON, Yu Ro LEE
  • Publication number: 20240105963
    Abstract: A method for manufacturing a gas diffusion layer for a fuel cell wherein carbon nanotubes are impregnated into Korean paper, thereby enhancing electroconductivity, and a gas diffusion layer manufactured thereby. The method for manufacturing a gas diffusion layer for a fuel cell which is to manufacture a gas diffusion layer as a constituent member of a unit cell in a fuel cell, includes a support preparation step of preparing a support with Korean paper; a dispersion preparation step of dispersing a carbon substance in a solvent to form a dispersion, a coating step of coating the support with the dispersion, and a thermal treatment step of thermally treating the dispersion-coated support to fix the carbon substance to the support.
    Type: Application
    Filed: March 6, 2023
    Publication date: March 28, 2024
    Inventors: Seung Tak Noh, Ji Han Lee, In Seok Lee, Jae Man Park, Won Jong Choi, Choong Hee Kim, Seong Hwang Kim, Jong Hoon Lee, Soo Jin Park, Seul Yi Lee
  • Publication number: 20240105604
    Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: Sung-Hun Lee, Seokjung Yun, Chang-Sup Lee, Seong Soon Cho, Jeehoon Han
  • Publication number: 20240100225
    Abstract: Disclosed is a method of manufacturing an artificial skin structure applied with a haptic technology, in which a polymer layer made of a PVC gel material is interposed between electrodes made of a hydrogel material to accurately recognize a pressing form, a pressing direction, and a pressing degree of external force based on a capacitance change value or resistance change value to the external force applied to the electrode made of a hydrogel material, and particularly, a material having excellent elasticity is applied to an electrode and a polymer layer itself to accurately recognize and utilize various motions, such as stroking, pinching, and twisting motions, instead of a simple pressing motion, and an artificial skin structure manufactured by the same.
    Type: Application
    Filed: April 20, 2023
    Publication date: March 28, 2024
    Applicant: Korea University Of Technology And Education Industry-University Cooperation Foundation
    Inventors: Sang-Youn KIM, Seok-Han LEE
  • Publication number: 20240107441
    Abstract: A method of a terminal may comprise: receiving a first message including state information of a base station from the base station; identifying preliminary inactive state information included in the first message when the state information of the base station indicates a preliminary inactive state; and performing a cell selection based on the preliminary inactive state information.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 28, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyun Seo PARK, Yong Jin KWON, Yun Joo KIM, Han Jun PARK, Jung Bo SON, An Seok LEE, Yu Ro LEE, Heesoo LEE, Sung Cheol CHANG
  • Publication number: 20240105481
    Abstract: The present invention provides a latching guide structure arranged inside a door of semiconductor carrier. The latching guide structure comprises an upper latching part, a lower latching part, at least one elastic unit and a driver. Moreover, a first guiding portion of the upper latching part is matched with a second guiding portion of the lower latching part, therefore to define the installation space for the at least one elastic unit. On the other hand, the driver simultaneously actuates an upper actuating unit of the first guiding portion and a lower actuating unit of the second guiding portion to linearly move in reverse direction therebetween. The range of the linear motion of the upper actuating unit and the lower actuating unit represents the compression or extension of the at least one elastic unit, determining to control the open/close status of the upper latching part and the lower latching part.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 28, 2024
    Inventors: MING-CHIEN CHIU, CHIH-MING LIN, CHENG-HAN CHOU, PO-TING LEE
  • Publication number: 20240107330
    Abstract: Computer-implemented methods for drone-assisted communications networks are provided. Aspects include collecting, from one or more sensing drones, signal strength information for a communications network in a geographic area and creating, based at least in part on the signal strength information, a signal strength map for the geographic area. Aspects also include deploying one or more networking drones into the geographic area, wherein a location of the one or more drones in the geographic area is determined based at least in part on the signal strength map. The one or more networking drones are configured to provide access to the communications network.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Changchang Liu, Wei-Han Lee, Shiqiang Wang, Seraphin Bernard Calo, Dinesh C. Verma
  • Patent number: 11942007
    Abstract: A transparent display device is provided. The transparent display device includes a display unit having a circuit area and a transparent area. The display unit includes a plurality of signal lines located in the circuit area, a plurality of pixel circuits electrically connected to the signal lines and located in the circuit area, a plurality of light-emitting elements driven by the pixel circuits and located in the circuit area, and an encapsulation layer located in the circuit area and the transparent area. A first thickness of the encapsulation layer located in the circuit area is different from a second thickness of the encapsulation layer located in the transparent area.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 26, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Yu-Chia Huang, Tsung-Han Tsai, Kuan-Feng Lee
  • Patent number: 11941249
    Abstract: A memory device, a host device and a memory system are provided. The memory device may include a plurality of storage units configured to store data, and at least one device controller configured to, receive a read command from at least one host device and to read data stored in the plurality of storage units in response to the read command, the at least one host device including at least one host memory including a plurality of HPB (high performance boosting) entry storage regions, and provide the at least one host device with a response command, the response command indicating an activation or deactivation of the plurality of HPB entry storage regions, the response command including HPB entry type information which indicates a HPB entry type of the HPB entry storage region.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Woo Kim, Jae Sun No, Byung June Song, Kyoung Back Lee, Wook Han Jeong
  • Patent number: 11942635
    Abstract: The present invention relates to a positive electrode active material and a lithium secondary battery using a positive electrode containing the positive electrode active material. More particularly, the present invention relates to a positive electrode active material that is able to solve a problem of increased resistance according to an increase in Ni content by forming a charge transport channel in a lithium composite oxide and a lithium secondary battery using a positive electrode containing the positive electrode active material.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: March 26, 2024
    Assignee: ECOPRO BM CO., LTD.
    Inventors: Moon Ho Choi, Jun Won Suh, Jin Kyeong Yun, Jung Han Lee, Mi Hye Yun, Seung Woo Choi, Gwang Seok Choe, Ye Ri Jang, Joong Ho Bae
  • Patent number: 11942529
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. Each of the plurality of semiconductor layers extends along a first lateral direction. The semiconductor device includes a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers. The lower portion of the gate structure comprises a plurality of first gate sections that are laterally aligned with the plurality of semiconductor layers, respectively, and wherein each of the plurality of first gate sections has ends that each extend along the second lateral direction and present a first curvature-based profile.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Hsiao Wen Lee
  • Patent number: 11942542
    Abstract: A semiconductor device includes a substrate, a gate dielectric layer, a gate electrode, a field plate, a source electrode and a drain electrode. The gate dielectric layer is disposed on the substrate and includes a first portion having a first thickness, a second portion having a second thickness, and a third portion having a third thickness. The first, second and third thicknesses are different from each other, and the first thickness is smaller than the second and third thicknesses. The gate electrode is disposed on the first portion of the gate dielectric layer. The field plate is separated from and electrically coupled to the gate electrode, and is disposed on the second and third portions of the gate dielectric layer. The source and drain electrodes are disposed on the sides of the gate electrode and the field plate, respectively.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: March 26, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Syed-Sarwar Imam, Chia-Hao Lee, Chih-Hung Lin, Kun-Han Lin
  • Patent number: 11938272
    Abstract: The present invention discloses a respiratory mask to connect a user and a breathing tube for receiving a first gas and releasing a second gas, so as to provide an user's respiratory system to exchange gas. It comprises a main part, an air chamber exchange part, an insert and a clamping part. The main part provides a first, second, and third openings that are communicated each other. The first opening connects to the breathing tube to receive the first gas from the breathing tube. The air chamber exchange part provides an exhaust assembly to relieve pressure according to an internal air pressure of the air chamber exchange part. The insert connects to the user's nose so as to direct the first gas to the user or direct the second gas from the user to the air chamber exchange part. The clamping part connects to the user's mouth.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: March 26, 2024
    Assignee: MACKAY MEMORIAL HOSPITAL
    Inventors: Wen-Han Chang, Shih-Yi Lee, Ren-Jei Chung, Ching-Yu Kuo
  • Publication number: 20240096757
    Abstract: An integrated circuit (IC) die includes first through third adjacent rows of through-silicon vias (TSVs), and first and second adjacent rows of memory macros. TSVs of the first row of TSVs extend through and are electrically isolated from memory macros of the first row of memory macros. TSVs of the third row of TSVs extend through and are electrically isolated from memory macros of the second row of memory macros.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Hidehiro FUJIWARA, Tze-Chiang HUANG, Hong-Chen CHENG, Yen-Huei CHEN, Hung-Jen LIAO, Jonathan Tsung-Yung CHANG, Yun-Han LEE, Lee-Chung LU
  • Patent number: D1019386
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: March 26, 2024
    Assignee: Kolmar Korea Co., Ltd.
    Inventors: Chang Soo Lee, Sang In Han, Hye Jin Jung, Hee Yoon Kim