Patents by Inventor Han-Ming Sheng

Han-Ming Sheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6734116
    Abstract: Within a damascene method for forming a microelectronic fabrication, there is employed an etch stop layer comprising a comparatively low dielectric constant dielectric material sub-layer having formed thereupon a comparatively high dielectric constant dielectric material sub-layer. Within the method there is also simultaneously etched: (1) an anti-reflective coating layer from an inter-metal dielectric layer; and (2) the etch stop layer from a contact region. The microelectronic fabrication is formed with enhanced performance and enhanced reliability.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: May 11, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Cheng Guo, Dian-Hau Chen, Li-Kong Turn, Han-Ming Sheng
  • Publication number: 20030134521
    Abstract: Within a damascene method for forming a microelectronic fabrication, there is employed an etch stop layer comprising a comparatively low dielectric constant dielectric material sub-layer having formed thereupon a comparatively high dielectric constant dielectric material sub-layer. Within the method there is also simultaneously etched: (1) an anti-reflective coating layer from an inter-metal dielectric layer; and (2) the etch stop layer from a contact region. The microelectronic fabrication is formed with enhanced performance and enhanced reliability.
    Type: Application
    Filed: January 11, 2002
    Publication date: July 17, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Cheng Guo, Dian-Hau Chen, Li-Kong Turn, Han-Ming Sheng
  • Patent number: 6477265
    Abstract: A system and method for detecting defects in integrated circuit wafers related to photolithographic processing of the wafers. The system has an image processor, or image computer, and an image memory, which has image data for production wafer types stored therein. A defect detection wafer is scanned by an objective lens and the image is detected by an image detector. The image detector data output is fed to the image processor along with image data for a selected production wafer type from the memory. The image processor feeds image data to a visual display which displays a superimposed image of the defect detection wafer and the selected production wafer type. This superimposed image makes it easier to detect actual defects in a production wafer.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: November 5, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Han-Ming Sheng
  • Patent number: 6344365
    Abstract: A new method and apparatus is provide whereby light diffusion within the light measurement toll has been eliminated. A layer of Anti Reflective Coating is deposited on the outside of the second surface of a quartz mask thereby preventing light that is reflected internally to the quartz mask from exiting the mask. All reflected light is therefor eliminated and, with that, the source of light diffusion is eliminated.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: February 5, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Han-Ming Sheng, Cheng-Chen Kuo
  • Patent number: 6330355
    Abstract: A frame layout and method for determining the overlay accuracy of a first chip image relative to a second chip image when the first and second chip images are used to form a single chip. One embodiment employs a vernier scale in two orthoginal directions included in the scribeline of both the first chip image and the second chip image. Another embodiment employs a box in box pattern included in the scribeline of both the first chip image and the second chip image. A layer of photoresist on an integrated circuit wafer is exposed with the first and second chip image and the associated monitor images. When the photoresist is developed the overlay accuracy of the first chip image relative to the second chip image can be determined directly from the monitor images in the photoresist.
    Type: Grant
    Filed: April 1, 1999
    Date of Patent: December 11, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chia-Hsiang Chen, Chih-Chien Hung, Han-Ming Sheng, Hsiang-Chung Liu, Chun-Mei Lee, De-Ming Liang, Li-Kong Turn, Ming-Huei Tseng
  • Patent number: 6309944
    Abstract: A new method is provided to align overlying layers for wafer stepper tools that are use for the manufacturing of semiconductor devices. A reference stepper and a reference mask are used, the mask contains a pattern of reference alignment marks that are created using this mask in a reference first surface on a substrate. A matching stepper that must be calibrated against the reference stepper is then used to create, using the reference mask, alignment marks in a second surface on a substrate. The alignment error between the reference alignment marks and the alignment marks that have been created in the second surface are measured and used as input to software modeling programs that provide numerical data indicating the corrections that must be applied to the matching stepper in order to adjust the alignment of the matching stepper to the alignment of the reference stepper.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: October 30, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Han-Ming Sheng, Cheng-Chen Kuo, Chu-Wen Huang, Kuo-Hung Chao
  • Patent number: 6252670
    Abstract: A method is described for determining more accurate Cauchy coefficients for a constant-angle reflection-interference spectrometer (CARIS). This allows photoresist thicknesses for product wafers to be measured more accurately. The method for determining the Cauchy coefficients consists of coating monitor wafers with photoresist layers having various thicknesses formed by varying the spin speed during photoresist coating. The photoresist layers are then patterned using monochromatic radiation through a mask and developing photoresist. The monochromatic radiation has a dose sufficient to just clear the photoresist layers from the surface of the wafers during development. The linewidths of the photoresist are measured and plotted as a function of photoresist thickness to generate a critical dimension (CD) swing curve having an essentially sinusoidal shape that results from interference between the transmitted and reflected monochromatic radiation in the photoresist.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: June 26, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Han-Ming Sheng, Ren-Jyh Leu