Patents by Inventor Han Nae Kim

Han Nae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120273876
    Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes a semiconductor substrate that includes a cell region and a peripheral circuit area. The method for forming the semiconductor includes forming a guard pattern of an insulation material. The guard pattern is located at an edge part between the cell region and the peripheral circuit region and is buried in the semiconductor substrate. As a result, the semiconductor device prevents oxidation of the guard pattern, such that a cell gate oxidation integrity (GOI) failure is improved and an IDD failure is prevented from being generated.
    Type: Application
    Filed: January 10, 2012
    Publication date: November 1, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventor: Han Nae KIM
  • Patent number: 8274111
    Abstract: A method for fabricating a semiconductor apparatus including a buried gate removes factors deteriorating the operational reliability of the semiconductor device such as the electrical connection between a contact and a word line, and increases a processing margin when forming the contact disposed on a source/drain region. The method includes forming a recess in a semiconductor substrate, forming a gate in a lower portion of the recess, forming a first insulation layer over the gate, growing silicon over the first insulation layer in the recess, and depositing a second insulation layer over the semiconductor substrate and in the remaining portion of the recess.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: September 25, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Han Nae Kim
  • Publication number: 20110024815
    Abstract: A method for fabricating a semiconductor apparatus including a buried gate removes factors deteriorating the operational reliability of the semiconductor device such as the electrical connection between a contact and a word line, and increases a processing margin when forming the contact disposed on a source/drain region. The method includes forming a recess in a semiconductor substrate, forming a gate in a lower portion of the recess, forming a first insulation layer over the gate, growing silicon over the first insulation layer in the recess, and depositing a second insulation layer over the semiconductor substrate and in the remaining portion of the recess.
    Type: Application
    Filed: December 30, 2009
    Publication date: February 3, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventor: Han Nae KIM
  • Patent number: 7858477
    Abstract: A method for manufacturing a semiconductor device includes forming a bulb-type trench separated from a surrounding gate and forming a buried bit line in the bulb-type trench, thereby preventing electric short of a word line and the buried bit line. A semiconductor device includes a vertical pillar formed over a semiconductor substrate, a surrounding gate formed outside the vertical pillar, and a buried bit line separated from the surrounding gate.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: December 28, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Han Nae Kim
  • Publication number: 20090230466
    Abstract: A method for manufacturing a semiconductor device includes forming a bulb-type trench separated from a surrounding gate and forming a buried bit line in the bulb-type trench, thereby preventing electric short of a word line and the buried bit line. A semiconductor device includes a vertical pillar formed over a semiconductor substrate, a surrounding gate formed outside the vertical pillar, and a buried bit line separated from the surrounding gate.
    Type: Application
    Filed: May 8, 2008
    Publication date: September 17, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Han Nae Kim