Abstract: A gate driving device and an operating method are provided. The gate driving device includes a plurality of gate driving circuits and a control circuit. The gate driving circuits generate a plurality of gate driving signals having different timing. The control circuit is coupled to a plurality of candidate gate driving circuits among the gate driving circuits. The control circuit selects one of the candidate gate driving circuits as an initial stage gate driving circuit per one scanning cycle. A series connection mode between the gate driving circuits is changed in response to a scan selection signal.

Abstract: A pulse-width modulation (PWM) circuit includes a partition circuit coupled to receive a PWM value representing a duty cycle of a PWM signal to be generated, and configured to accordingly generate a most-significant-bits (MSB) value representing higher-order bits of the PWM value and a least-significant-bits (LSB) value representing lower-order bits of the PWM value; a PWM generator coupled to receive the MSB value or a derivative thereof, and configured to accordingly generate a primary signal with a duty cycle corresponding to the MSB value; a delay circuit that generates a delay signal representing the primary signal with delay time determined according to the LSB value or a derivative thereof; and a combine circuit that generates the PWM signal according to the primary signal and the delay signal, by performing a logical operation on the primary signal and the delay signal.

Abstract: A multi-level voltage generator includes P-type metal-oxide-semiconductor (PMOS) transistors that generate corresponding positive voltages and a common voltage respectively, each PMOS transistor having a source connected to corresponding generated voltage, and a drain connected to an output node to provide the corresponding generated voltage; N-type metal-oxide-semiconductor (NMOS) transistors that generate corresponding negative voltages and the common voltage respectively, each NMOS transistor having a source connected to corresponding generated voltage, and a drain connected to the output node to provide the corresponding generated voltage; and body-voltage selectors that adaptively select a body voltage for the plurality of PMOS transistors and NMOS transistors respectively, except PMOS transistor associated with a highest positive voltage and NMOS transistor associated with a lowest negative voltage with body and source connected together.

Abstract: An apparatus for driving a panel in a display system includes a reset device, a gate driver and a pull-high circuit. The reset device asserts a control signal when the display system is powered off. The gate driver has an input terminal receiving the control signal and turns on all rows of pixels on the panel when the control signal is asserted. The pull-high circuit includes a resistor and a switch, in which the resistor has a first end coupled to the input terminal, and the switch decouples a second end of the resistor from a first reference voltage when the display system is powered off.

Abstract: A gate driver including a shift register, a level shifter, an output buffer, and a processing unit. The shift register generates a shifted signal. The level shifter generates a level signal according to a first operation voltage, a second operation voltage and the shifted signal. The output buffer provides a scan signal according to the level signal. The processing unit controls the level signal to follow the second operation voltage when the first operation voltage equals to a first preset value and the second operation voltage is higher than a second preset value less than the first preset value.

Abstract: A gate driver including a shift register, a level shifter, an output buffer, and a processing unit. The shift register generates a shifted signal. The level shifter generates a level signal according to a first operation voltage, a second operation voltage and the shifted signal. The output buffer provides a scan signal according to the level signal. The processing unit controls the level signal to follow the second operation voltage when the first operation voltage equals to a first preset value and the second operation voltage is higher than a second preset value less than the first preset value.

Abstract: An apparatus for driving a panel in a display system includes a reset device, a gate driver and a pull-high circuit. The reset device asserts a control signal when the display system is powered off. The gate driver has an input terminal receiving the control signal and turns on all rows of pixels on the panel when the control signal is asserted. The pull-high circuit includes a resistor and a switch, in which the resistor has a first end coupled to the input terminal, and the switch decouples a second end of the resistor from a first reference voltage when the display system is powered off.