Patents by Inventor Han Sol JUN

Han Sol JUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11296276
    Abstract: Disclosed is a memory device including a multi-bit perpendicular magnetic tunnel junction, wherein the multi-bit perpendicular magnetic tunnel junction includes an upper synthetic antiferromagnetic layer, pinned layer, lower dual free layer, and upper free layer formed in a laminated manner between a top electrode and a bottom electrode.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: April 5, 2022
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun Park, Jong Ung Baek, Kei Ashiba, Jin Young Choi, Mi Ri Park, Hyun Gyu Lee, Han Sol Jun, Sun Hwa Jung
  • Patent number: 11133458
    Abstract: Disclosed is a memory device. A memory device according to an embodiment of the present invention includes a memory device including a substrate; and a lower electrode, seed layer, lower synthetic antiferromagnetic layer, magnetic tunnel junction, upper synthetic antiferromagnetic layer, and upper electrode that are laminated on the substrate, wherein the magnetic tunnel junction includes a lower pinned layer, lower tunnel barrier layer, lower free layer, separation layer, upper free layer, upper tunnel barrier layer and upper pinned layer that are sequentially laminated.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: September 28, 2021
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun Park, Jin Young Choi, Han Sol Jun, Dong Gi Lee, Kondo Kei, Jong Ung Baek
  • Publication number: 20210135091
    Abstract: Disclosed is a memory device including a multi-bit perpendicular magnetic tunnel junction, wherein the multi-bit perpendicular magnetic tunnel junction includes an upper synthetic antiferromagnetic layer, pinned layer, lower dual free layer, and upper free layer formed in a laminated manner between a top electrode and a bottom electrode.
    Type: Application
    Filed: November 19, 2019
    Publication date: May 6, 2021
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun PARK, Jong Ung BAEK, Kei ASHIBA, Jin Young CHOI, Mi Ri PARK, Hyun Gyu LEE, Han Sol JUN, Sun Hwa JUNG
  • Publication number: 20200350489
    Abstract: Disclosed is a memory device. A memory device according to an embodiment of the present invention includes a memory device including a substrate; and a lower electrode, seed layer, lower synthetic antiferromagnetic layer, magnetic tunnel junction, upper synthetic antiferromagnetic layer, and upper electrode that are laminated on the substrate, wherein the magnetic tunnel junction includes a lower pinned layer, lower tunnel barrier layer, lower free layer, separation layer, upper free layer, upper tunnel barrier layer and upper pinned layer that are sequentially laminated.
    Type: Application
    Filed: January 4, 2019
    Publication date: November 5, 2020
    Applicant: IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
    Inventors: Jea Gun PARK, Jin Young CHOI, Han Sol JUN, Dong Gi LEE, Kondo KEI, Jong Ung BAEK