Patents by Inventor HAN YUAN

HAN YUAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180054191
    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.
    Type: Application
    Filed: November 1, 2017
    Publication date: February 22, 2018
    Inventors: James Lawrence GORECKI, Han-Yuan TAN
  • Publication number: 20180045989
    Abstract: A display apparatus including a display panel and a light source module is provided. The display panel displays an image frame according to a light beam. The light source module provides the light beam to the display panel. The light source module includes a light emitting device, a lens module, a reflection device, and a light emitting surface. The light emitting device provides the light beam. The lens module is disposed in a transmission path of the light beam and adjusts the light beam to be focused or dispersed. The reflection device receives the light beam passing from the lens module and reflects the light beam to the light emitting surface. The lens module includes a lens disposed in the transmission path of the light beam and moves relative to the light emitting device to adjust a viewing angle of the light emitting surface.
    Type: Application
    Filed: April 25, 2017
    Publication date: February 15, 2018
    Applicant: Young Lighting Technology Inc.
    Inventors: Chun-Wei Lee, Yu-Sung Lai, Sheng Chou, Han-Yuan Liu
  • Patent number: 9837998
    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: December 5, 2017
    Assignee: INPHI CORPORATION
    Inventors: James Lawrence Gorecki, Han-Yuan Tan
  • Publication number: 20170207864
    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with gain boost. More specifically, some embodiments of the present disclosure are directed to a buffer with a stacked transistor configuration, wherein the first transistor receives an input signal and the second transistor receives a complement of the input signal. The first transistor is configured to generate a non-inverting response to the input signal, and the second transistor is configured to generate an inverting response to the complement of the input signal, and to generate a negative gds effect, enabling the buffer to exhibit low power and unity gain across a wide bandwidth. In other embodiments, the stacked transistor configuration can be deployed in a full differential implementation. In other embodiments, the buffer can include techniques for improving linearity, DC level shifts, capacitive input loading, and output slewing, settling, and drive capabilities.
    Type: Application
    Filed: March 31, 2017
    Publication date: July 20, 2017
    Inventors: James Lawrence GORECKI, Han-Yuan TAN
  • Patent number: 9647643
    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with gain boost. More specifically, some embodiments of the present disclosure are directed to a buffer with a stacked transistor configuration, wherein the first transistor receives an input signal and the second transistor receives a complement of the input signal. The first transistor is configured to generate a non-inverting response to the input signal, and the second transistor is configured to generate an inverting response to the complement of the input signal, and to generate a negative gds effect, enabling the buffer to exhibit low power and unity gain across a wide bandwidth. In other embodiments, the stacked transistor configuration can be deployed in a full differential implementation. In other embodiments, the buffer can include techniques for improving linearity, DC level shifts, capacitive input loading, and output slewing, settling, and drive capabilities.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: May 9, 2017
    Assignee: INPHI CORPORATION
    Inventors: James Lawrence Gorecki, Han-Yuan Tan
  • Publication number: 20170126329
    Abstract: The present disclosure provides a detailed description of techniques for implementing a wideband low dropout voltage regulator with power supply rejection boost. More specifically, some embodiments of the present disclosure are directed to a voltage regulator comprising a voltage regulator core powered by a supply voltage and providing a regulated voltage output, and a power supply feed forward injection module delivering an injection signal to the voltage regulator core to effect a power supply rejection of the supply voltage variation from the regulated voltage. In one or more embodiments, the injection signal is determined from the supply voltage variation and a gain factor that is based on various design attributes of the output stage of the voltage regulator core. In one or more embodiments, the power supply feed forward injection module comprises a supply voltage sense circuit, a low pass filter, and one or more selectable transconductance amplifiers.
    Type: Application
    Filed: December 9, 2016
    Publication date: May 4, 2017
    Inventors: James Lawrence GORECKI, Han-Yuan TAN
  • Publication number: 20170126217
    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.
    Type: Application
    Filed: December 9, 2016
    Publication date: May 4, 2017
    Inventors: James Lawrence GORECKI, Han-Yuan TAN
  • Patent number: 9553569
    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: January 24, 2017
    Assignee: INPHI CORPORATION
    Inventors: James Lawrence Gorecki, Han-Yuan Tan
  • Patent number: 9552006
    Abstract: The present disclosure provides a detailed description of techniques for implementing a wideband low dropout voltage regulator with power supply rejection boost. More specifically, some embodiments of the present disclosure are directed to a voltage regulator comprising a voltage regulator core powered by a supply voltage and providing a regulated voltage output, and a power supply feed forward injection module delivering an injection signal to the voltage regulator core to effect a power supply rejection of the supply voltage variation from the regulated voltage. In one or more embodiments, the injection signal is determined from the supply voltage variation and a gain factor that is based on various design attributes of the output stage of the voltage regulator core. In one or more embodiments, the power supply feed forward injection module comprises a supply voltage sense circuit, a low pass filter, and one or more selectable transconductance amplifiers.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: January 24, 2017
    Assignee: INPHI CORPORATION
    Inventors: James Lawrence Gorecki, Han-Yuan Tan
  • Publication number: 20160347869
    Abstract: The present invention provides a facile method for separation (fractionation) of HA in a sample over a broad M range, including low M HA, by ion exchange (IEX) chromatography. The present invention also provides an assay method for quantifying in a sample the presence of low M HA in total HA isolated from a biological source. The method involves HA fractionation according to M by use of IEX separation, followed by HA-specific assay of HA size range fractions.
    Type: Application
    Filed: February 6, 2015
    Publication date: December 1, 2016
    Inventors: Mary COWMAN, Han YUAN, Ripal AMIN
  • Publication number: 20160352372
    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with gain boost. More specifically, some embodiments of the present disclosure are directed to a buffer with a stacked transistor configuration, wherein the first transistor receives an input signal and the second transistor receives a complement of the input signal. The first transistor is configured to generate a non-inverting response to the input signal, and the second transistor is configured to generate an inverting response to the complement of the input signal, and to generate a negative gds effect, enabling the buffer to exhibit low power and unity gain across a wide bandwidth. In other embodiments, the stacked transistor configuration can be deployed in a full differential implementation. In other embodiments, the buffer can include techniques for improving linearity, DC level shifts, capacitive input loading, and output slewing, settling, and drive capabilities.
    Type: Application
    Filed: August 8, 2016
    Publication date: December 1, 2016
    Inventors: James Lawrence GORECKI, Han-Yuan TAN
  • Patent number: 9432000
    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with gain boost. More specifically, some embodiments of the present disclosure are directed to a buffer with a stacked transistor configuration, wherein the first transistor receives an input signal and the second transistor receives a complement of the input signal. The first transistor is configured to generate a non-inverting response to the input signal, and the second transistor is configured to generate an inverting response to the complement of the input signal, and to generate a negative gds effect, enabling the buffer to exhibit low power and unity gain across a wide bandwidth. In other embodiments, the stacked transistor configuration can be deployed in a full differential implementation. In other embodiments, the buffer can include techniques for improving linearity, DC level shifts, capacitive input loading, and output slewing, settling, and drive capabilities.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: August 30, 2016
    Assignee: INPHI CORPORATION
    Inventors: James Lawrence Gorecki, Han-Yuan Tan
  • Publication number: 20140342654
    Abstract: A temperature control system includes a temperature switch, an air outlet valve, an air inlet valve, and a control device. The temperature switch is utilized to detect and determine the external temperature and internal temperature of a container. The control device receives a first and a second signal and determines whether the air outlet valve and the air inlet valve are opened or closed. When the control device receives the first signal, the control device opens the air outlet valve and the air inlet valve, when the control device receives the second signal, the control device closes the air outlet valve and the air inlet valve.
    Type: Application
    Filed: May 14, 2014
    Publication date: November 20, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: WEN-JEN WU, HAN-YUAN CHEN
  • Publication number: 20140158300
    Abstract: This invention provides a protective sheet for glass etching, having excellent etching solution penetration resistance, non-contaminating property and peeling efficiency. The protective sheet comprises a substrate and a PSA layer provided on one face of the substrate, such that, when the protective sheet is adhered to a non-etching area when etching glass, it protects the non-etching area from an etching solution. The PSA layer is constituted with a PSA having a gel fraction of 60% or higher. The PSA is an acrylic PSA comprising an acrylic polymer as a primary component. The acrylic polymer is synthesized by polymerizing starting monomers comprising, as a primary monomer, a monomer represented by a formula: CH2?CR1COOR2 (R1 is a hydrogen atom or a methyl group, and R2 is an alkyl group). The primary monomer comprises as a primary component a monomer with R2 being an alkyl group having 6 or more carbons.
    Type: Application
    Filed: June 8, 2012
    Publication date: June 12, 2014
    Applicants: NITTO DENKO (TAIWAN) CORPORATION, NITTO DENKO CORPORATION
    Inventors: Maiko Hayata, Michirou Kawanishi, Yu-Han Yuan, Jen-Chun Fang
  • Publication number: 20140053307
    Abstract: A protecting mask includes a main body, a mask unit, and multiple connecting members. The main body includes a connecting wall having an inner surface and an outer surface and formed with multiple first through holes. The mask unit is disposed at the outer surface of the connecting wall and is formed with multiple second through holes corresponding to the first through holes, respectively. Each connecting member includes an engaging portion removably engaging the mask unit, and a resilient protruding portion extending from the engaging portion through a corresponding pair of the first and second through holes, and engaging the inner surface of the connecting wall.
    Type: Application
    Filed: August 27, 2012
    Publication date: February 27, 2014
    Applicant: POLISON CORPORATION
    Inventor: Han-Yuan Cheng
  • Patent number: 8453836
    Abstract: A mobile device protective case (10) includes a frame (20) and a slidable shutter (30) mounted on the frame (20) to function as a slidable component. After a mobile device (50) has been inserted into the frame (20), the slidable shutter (30) hides a touch panel (51) of the mobile device (50) to prevent the touch panel (51) from being scratched or scraped. To start using the mobile device (50), a user moves the slidable shutter (30), such that the touch panel (51) of the mobile device (50) is exposed and can be directly operated by the user.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: June 4, 2013
    Assignee: Topkase International Co., Ltd.
    Inventors: Han-Yuan Wang, Chih-Ming Chang, David John Ardener, Mao-Shen Wang
  • Publication number: 20130118933
    Abstract: A mobile device protective case (10) includes a frame (20) and a slidable shutter (30) mounted on the frame (20) to function as a slidable component. After a mobile device (50) has been inserted into the frame (20), the slidable shutter (30) hides a touch panel (51) of the mobile device (50) to prevent the touch panel (51) from being scratched or scraped. To start using the mobile device (50), a user moves the slidable shutter (30), such that the touch panel (51) of the mobile device (50) is exposed and can be directly operated by the user.
    Type: Application
    Filed: November 14, 2011
    Publication date: May 16, 2013
    Applicant: TOPKASE INTERNATIONAL CO., LTD.
    Inventors: Han-Yuan WANG, Chih-Ming Chang, David John Ardener, Mao-Shen Wang
  • Publication number: 20080223565
    Abstract: A heat transfer device includes a receptacle having a number of partitions disposed for forming a number of fluid flowing passages within the receptacle, an inlet and a path formed in one side and communicating with the inlet and the fluid flowing passages of the receptacle, and a distributor having a tubular member engaged into the inlet and the path of the receptacle and having a number of orifices formed along the tubular member and aligned with the fluid flowing passages of the receptacle for guiding the fluid to evenly flow through the fluid flowing passages of the receptacle respectively. The distributor may include a manifold attached to the tubular member for bypassing the fluid.
    Type: Application
    Filed: March 13, 2007
    Publication date: September 18, 2008
    Inventors: Chi Yuan Lai, Han Yuan Chou
  • Publication number: 20070055596
    Abstract: A financial close system of record integrating: managing a financial period close process, attesting to adequate internal controls applicable to the period, displaying qualitative status of confidence and quantitative measure of progress in a financial control and the electronic archiving of the three as an executable and auditable embodiment of a financial period close binder.
    Type: Application
    Filed: April 3, 2006
    Publication date: March 8, 2007
    Applicant: MOVARIS, INC
    Inventors: STEVE YANKOVICH, NATHAN HOOVER, RAJESH BHATIA, ARTHUR ARDIZZONE, BRANDON DUNCAN, HAN YUAN
  • Publication number: 20060192222
    Abstract: A light emitting device is provided. The light emitting device includes a substrate, at least one light emitting chip and a first heat dissipation element. The substrate has a top surface and a bottom surface, and contacts are disposed on the top surface. The light emitting chip disposed on the top surface of the substrate is in contact with the contacts. The light emitting chip includes a light emitting layer, a positive electrode and a negative electrode. The light emitting layer is excited to emit a light by a current applied between the positive electrode and the negative electrode. The first heat dissipation element is disposed at the bottom surface of the substrate for transferring the heat generated by the light emitting chip out of the light emitting device, thus the operation temperature of the light emitting chip can be lowered.
    Type: Application
    Filed: December 1, 2005
    Publication date: August 31, 2006
    Inventors: Jyh-Chen Chen, Han-Yuan Chou, Gwo-Jiun Sheu, Farn-Shiun Hwu, Chine-Hung Cheng