Patents by Inventor Han Zhang

Han Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10582295
    Abstract: A head-mounted wearable device (HMWD) includes a bone conduction speaker (BCS) to provide audio output to a user wearing the HMWD. The BCS may be mounted within a recess of a temple of the HMWD. During wear a portion of the BCS is in physical contact with a head of the user. In one implementation, a head contact piece may be mounted to the side of the BCS that is proximate to the head. The head contact piece is contoured to maximize the contact area with the head, and may have a cross section that is approximately wedge shaped, with a thicker portion of the wedge proximate to the front of the HMWD. The BCS may include low damping elements to provide protection to the BCS from damage and improve performance, as well as high damping elements to reduce the transfer of vibrations from the BCS to the temple.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: March 3, 2020
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Xuan Zhong, Jung Sik Yang, Zhen Xu, Chun Sik Jeong, Jianchun Dong, Han Zhang
  • Publication number: 20200064955
    Abstract: A touch panel including a substrate, an insulating layer, touch electrode blocks, and electrode lines. The touch electrode blocks include an array of first type touch electrode blocks having a regular shape and a second type touch electrode block having an irregular shape. Ones of the first type touch electrode blocks are electrically connected to respective ones of the electrode lines by respective X first contact vias extending through the insulating layer, and the respective X first contact vias are arranged along a straight line in a column direction. The second type touch electrode block is electrically connected to a first corresponding one of the electrode lines by Y second contact vias extending through the insulating layer, and the Y second contact vias are arranged along at least one straight line in the column direction. X and Y are natural numbers, and 0.75×X?Y?1.25×X.
    Type: Application
    Filed: June 7, 2019
    Publication date: February 27, 2020
    Inventors: Zhen WANG, Xiaozhou Zhan, Lele Cong, Yun Qiao, Jian Sun, Han Zhang, Wenwen Qin, Zhengkui Wang
  • Publication number: 20200051654
    Abstract: The embodiments of the present disclosure relate to a shift registers unit and a driving method thereof, and a gate driving device. The shift register unit includes a first and second input circuit, a pull-down control circuit, an output circuit, a pull-down circuit, and a control circuit. The first input circuit provides a first control signal to a pull-up node. The second input circuit provides a second control signal to the pull-up node. The pull-down control circuit provides the voltage of a first voltage terminal to a pull-down node, or controls the voltage of the pull-down node. The output circuit provides a second clock signal to a signal output terminal. The pull-down circuit provides the voltage of the first voltage terminal to the pull-up node and the signal output terminal. The control circuit provides the first input signal to the pull-up node.
    Type: Application
    Filed: September 19, 2017
    Publication date: February 13, 2020
    Inventors: Zhen WANG, Jian SUN, Yun QIAO, Xiaozhou ZHAN, Fei HUANG, Han ZHANG, Wenwen QIN, Lele CONG, Zhengkui WANG
  • Publication number: 20200032332
    Abstract: Provided is a second generation sequencing-based method for simultaneously detecting microsatellite locus stability and genomic changes (prettyMSI), especially an application of the detection method in assisting in the diagnosis of patients with colorectal cancer and a corresponding kit. Microsatellite loci are selected from the 22 microsatellite loci as shown in table 1, or any combination of 15, 16, 17, 18, 19, 20, and 21 microsatellite loci of the 22 microsatellite loci.
    Type: Application
    Filed: January 25, 2018
    Publication date: January 30, 2020
    Inventors: Zhihong ZHANG, Yusheng HAN, Shaokun CHUAI, Chenglin LIU, Zhou ZHANG, Wanglong DENG, Bingsi LI, Fang LUO, Jing LIU, Han HAN-ZHANG
  • Patent number: 10547930
    Abstract: A head-mounted wearable device (HMWD) may incorporate bone conduction speakers (BCS) to generate audio output that is perceptible to a wearer. Due to the mechanical connection between the BCS and the rest of the device, when the output amplitude of the BCSs is too great, the air-conducted audio “leaks” and may be heard by other people. This leakage may result in eavesdropping by, or generate a nuisance to, those other people. The noise level in the environment around the HMWD is determined and used to dynamically adjust the amplitude of the audio output generated by the BCS. This adjustment improves the comfort and intelligibility of the audio output to the wearer while minimizing audio leakage to the surrounding environment.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: January 28, 2020
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Xuan Zhong, Jianchun Dong, Bozhao Tan, Han Zhang
  • Publication number: 20200029372
    Abstract: This disclosure provides a computer-implemented process for an attachment process to a network. The method comprises, receiving a data request from a user equipment, connecting the user equipment is to a mobile communication network through a first base station, determining a router bound to the user equipment, connecting the router to the mobile communication network through a second base station, establishing a connection between the user equipment and the router through the first base station and the second base station.
    Type: Application
    Filed: July 23, 2018
    Publication date: January 23, 2020
    Inventors: Ying Ying Xu, ShengYan Sun, Jin Rong Wang, Yu Han Zhang, Ya Nan Mo, Xiao Hai Ma
  • Publication number: 20200026699
    Abstract: A method of electing a rotating committee of byzantine fault tolerance (BFT) nodes in a decentralized computer network includes determining that a current committee of BFT nodes has outputted a predetermined number of committed transactions; identifying a plurality of candidate nodes, each respective candidate node of the plurality of candidate nodes having successfully processed, using a proof-of-work (PoW) protocol, a respective transaction of the predetermined number of committed transactions; and selecting, as a new committee of BFT nodes, a subset of the plurality of candidate nodes based on a random function.
    Type: Application
    Filed: July 19, 2019
    Publication date: January 23, 2020
    Inventors: Jiannan Zhang, Yang Liu, Han Zhang
  • Patent number: 10531174
    Abstract: The disclosure is related to compositions having an elastomer and phase change materials, materials having an ability to provide one or more sensations upon contact with a person's skin, or a combination thereof. The compositions are suitable for use in earpieces such as in-ear earpieces.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: January 7, 2020
    Assignee: Bose Corporation
    Inventors: Shawn J. Prevoir, Agota F. Fehervari, Christopher B. Ickler, Han Zhang, Andrew D. Dominijanni
  • Publication number: 20200005881
    Abstract: A shift register includes a first input sub-circuit, a pull-up control sub-circuit, and a pull-down control sub-circuit. The first input sub-circuit is configured to transmit a voltage from the first signal terminal to the first node under control of the first voltage terminal. The pull-up control sub-circuit is configured to be in a turn-on or turn-off state under control of the first node. The pull-down control sub-circuit is configured to transmit a voltage from the third voltage terminal to the pull-down node under control of the first node, transmit the voltage from the third voltage terminal to the pull-down node under control of the signal output terminal, and transmit a voltage from the first clock signal terminal to the pull-down node under control of the first clock signal terminal.
    Type: Application
    Filed: October 25, 2018
    Publication date: January 2, 2020
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Peng LIU, Zhen WANG, Han ZHANG, Kai ZHANG, Yun QIAO, Jian SUN, Bailing LIU, Fei HUANG, Zhengkui WANG, Jianjun ZHANG
  • Publication number: 20190385688
    Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes: an input circuit used to provide a pull-up node with a first control signal from a first control signal terminal; N output circuits, wherein an i-th output circuit is used to provide an i-th output terminal with an i-th clock signal from an i-th clock signal terminal; a pull-down control circuit used to provide a pull-down node with a first power source signal from a first power source terminal, and to provide the pull-down node with a second power source signal from a second power source terminal; and a pull-down circuit used to provide each output terminal and the pull-up node with the second power source signal.
    Type: Application
    Filed: August 23, 2018
    Publication date: December 19, 2019
    Inventors: Yishan Fu, Jun Fan, Fuqiang Li, Han Zhang
  • Publication number: 20190338350
    Abstract: Provided are a method and a device for detecting a genetic mutation, and a kit for typing genotypes of a pregnant woman and a fetus. The method comprises: performing high-throughput sequencing on free DNA in a pregnant woman's peripheral blood to obtain sequencing data; comparing the sequencing data with reference genome to obtain SNP sites; performing mixed genotyping on each SNP site to obtain target genotypes for each SNP site; and selecting a mutation site that causes the gene mutation from the genotype of the fetus in the target genotypes.
    Type: Application
    Filed: December 25, 2017
    Publication date: November 7, 2019
    Applicant: ANNOROAD GENE TECHNOLOGY (BEIJING) CO
    Inventors: Yang DU, Shengbin PENG, Feng HUI, Han ZHANG, Zhaoling XUAN, Dawei LI, Junbin LIANG, Chongjian CHEN
  • Publication number: 20190333597
    Abstract: A shift register includes a first input sub-circuit configured to transfer a first input signal at a first input terminal to a first node in response to a first scan signal at a first scan terminal being active, a first level control sub-circuit configured to transfer a first power supply voltage at a first power supply terminal to a first output control node and a second output control node in response to the first node being at an active potential, and an output sub-circuit configured to transfer a first clock signal at a first clock terminal to a first output in response to the first output control node being at an active potential, and to transfer a second clock signal at a second clock terminal to a second output terminal in response to the second output control node being at an active potential.
    Type: Application
    Filed: January 8, 2019
    Publication date: October 31, 2019
    Inventors: Peng LIU, Jun Fan, Yusheng Liu, Bailing Liu, Han Zhang, Zhen Wang, Yun Qiao, Zhengkui Wang, Lele Cong, Mei Li
  • Publication number: 20190288009
    Abstract: A display panel and a display device are provided. The display panel includes a base substrate, the base substrate includes a display region and a non-display region, the display region includes a main display region and a peripheral display region, and the peripheral display region includes an irregular display region; the non-display region includes a first region and a second region, the first region is adjacent to the irregular display region, and the second region is adjacent to other regions of the peripheral display region than the irregular display region; the display region includes at least one signal line, the non-display region includes at least one functional circuit and at least one wire, and the at least one functional circuit is coupled to the at least one signal line via the at least one wire.
    Type: Application
    Filed: March 13, 2019
    Publication date: September 19, 2019
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yun QIAO, Zhen WANG, Lele CONG, Zhengkui WANG, Jianjun ZHANG, Han ZHANG, Wenwen QIN, Fei HUANG, Xiaozhou ZHAN, Peng LIU, Jian SUN
  • Publication number: 20190287445
    Abstract: An array substrate and a display panel are provided. The array substrate includes a base substrate having a notch, the base substrate comprising a first region and a second region on opposite sides of the notch; a plurality of gate lines disposed on the base substrate and configured to respectively drive a plurality of rows of pixels on the base substrate, each of the plurality of gate lines being interrupted by the notch into a first gate sub-line in the first region and a second gate sub-line in the second region; and a gate driving device in the first region and/or the second region, the gate driving device is configured such that the first gate sub-line and the second gate sub-line of each of the plurality of gate lines are simultaneously scanned.
    Type: Application
    Filed: August 9, 2018
    Publication date: September 19, 2019
    Inventors: Yun Qiao, Zhen Wang, Zhengkui Wang, Han Zhang, Jian Sun, Xiaozhou Zhan, Fei Huang, Wenwen Qin, Jianjun Zhang
  • Patent number: 10394092
    Abstract: The present disclosure provides a display substrate and a method of manufacturing the same, and a display device. The display substrate includes a base substrate and a sensing electrode layer located on one side of the base substrate, the sensing electrode layer comprising a sensing electrode and a dummy pattern that comprises dummy sub-patterns arranged into columns, each dummy sub-pattern having a first border defining the dummy sub-pattern in a column direction, and first borders of the dummy sub-patterns being non-periodically arranged.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: August 27, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Han Zhang, Xiaozhou Zhan
  • Publication number: 20190235219
    Abstract: A superresolution STED-NSIM apparatus having an epifluorescence architecture utilizing a 2D structured STED pattern having a N.A. less than a N.A. of the microscope objective and no surface plasmon resonance (SPR) effects. A superresolution STED-NSIM imaging method using a fully deterministic imaging processing method, in which a pre-calibrated set of parameters are used to process all image data.
    Type: Application
    Filed: August 30, 2017
    Publication date: August 1, 2019
    Applicant: Arizona Board of Regents on Behalf of the University of Arizona
    Inventors: Leilei Peng, Yu Li, Han Zhang
  • Publication number: 20190235294
    Abstract: An array substrate includes a base substrate, a plurality of first signal lines extending in a first direction, a plurality of second signal lines located on a different layer from the first signal lines and extending in a second direction intersecting the first direction, and a plurality of touch signal lines extending in the second direction disposed on the base substrate. Each touch signal line includes a first touch line segment and a second touch line segment, the first touch line segment disposed on the same layer as the first signal lines, and at least partially overlapping with at least one of the second signal lines in a direction perpendicular to a surface of the base substrate, the second touch line segment disposed on a different layer from the first signal lines, and the first touch line segment electrically connected with the second touch line segment through a first via.
    Type: Application
    Filed: November 5, 2018
    Publication date: August 1, 2019
    Inventors: Zhengkui WANG, Jian SUN, Fei HUANG, Jiguo WANG, Yun QIAO, Xiaozhou ZHAN, Han ZHANG, Zhen WANG, Wenwen QIN, Lele CONG, Peng LIU, Jianjun ZHANG
  • Publication number: 20190235333
    Abstract: The present disclosure discloses an array substrate and its manufacturing method, a display panel and its manufacturing method, and a display device. The array substrate includes: a base substrate; a plurality of data lines; and a plurality of pixel units arranged on the base substrate, where each of the plurality of pixel units includes a plurality of subpixel units, and the plurality of subpixel units is in a one-to-one correspondence with the plurality of data lines, where each of the plurality of subpixel units includes a first subpixel unit and a second subpixel unit that are adjacently arranged, and the data line corresponding to the first subpixel unit and the data line corresponding to the second subpixel unit are both arranged at a position corresponding to a boundary between the first subpixel unit and the second subpixel unit.
    Type: Application
    Filed: November 7, 2018
    Publication date: August 1, 2019
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Zhengkui WANG, Jian SUN, Yun QIAO, Han ZHANG, Zhen WANG, Ruichao LIU, Jianjun ZHANG, Peng LIU
  • Publication number: 20190228730
    Abstract: Embodiments of the present application provide a display driving circuit, a method for controlling the same, and a display apparatus. The display driving circuit includes a plurality of function multiplexing circuits, and each of the plurality of function multiplexing circuits includes a data transmission terminal, an enabling signal terminal, a first signal terminal and a second signal terminal, and is configured to provide a test signal to the data transmission terminal and release static electricity at the data transmission terminal through the first signal terminal or the second signal terminal under control of the enabling signal terminal, the first signal terminal, and the second signal terminal, wherein the data transmission terminal is configured to be connected to at least one data line.
    Type: Application
    Filed: March 8, 2018
    Publication date: July 25, 2019
    Inventors: Lele Cong, Jian Sun, Wenwen Qin, Han Zhang
  • Patent number: D877237
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: March 3, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Niranjan Madan Mohan Bhatia, Eliot Kim, Han Zhang