Patents by Inventor HAN-ZONG WU
HAN-ZONG WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11852465Abstract: The disclosure provides a wafer inspection method and wafer inspection apparatus. The method includes: receive scanning information of at least one wafer, wherein the scanning information includes a plurality of haze values; the scanning information is divided into a plurality of information blocks according to the unit block, and the feature value of each of the plurality of information blocks is calculated according to the plurality of haze values included in each of the plurality of information blocks; and converting the feature value into a color value according to the haze upper threshold and the haze lower threshold, generating the color value corresponding to the at least one wafer according to the converted color value according to the feature value, whereby the color graph displays the texture content of the at least one wafer.Type: GrantFiled: January 27, 2022Date of Patent: December 26, 2023Assignee: GlobalWafers Co., Ltd.Inventors: Shang-Chi Wang, Miao-Pei Chen, Han-Zong Wu, Chia-Chi Tsai, I-Ching Li
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Publication number: 20230357916Abstract: A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon nitride (SiC) substrate having a carbon face (C-face) without an off-angle; B: form an amorphous structure layer on the C-face of the SiC substrate; C: deposit a first group III nitride layer on the amorphous structure layer; and D: deposit a second group III nitride layer on the first group III nitride layer. By forming the amorphous structure layer, a top surface of the second group III nitride layer could be made to be in a flat and smooth state.Type: ApplicationFiled: February 1, 2023Publication date: November 9, 2023Applicant: GLOBALWAFERS CO., LTD.Inventors: PO-JUNG LIN, HAN-ZONG WU
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Publication number: 20230360909Abstract: A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon carbide (SiC) substrate, wherein a silicon face (Si-face) of the SiC substrate is taken as a growth face having an off-angle relative to the Si-face of the SiC substrate; B: deposit a nitride angle adjustment layer having a thickness less than 50 nm on the growth face of the SiC substrate through physical vapor deposition (PVD); C: deposit a first group III nitride layer on the nitride angle adjustment layer; and D: deposit a second group III nitride layer on the first group III nitride layer. Through the method of manufacturing the epitaxial structure, when the silicon face of the silicon carbide substrate has the off-angle, the problem of a poor epitaxial quality of the first group III nitride layer and a poor epitaxial quality of the second group III nitride layer could be effectively relieved.Type: ApplicationFiled: February 1, 2023Publication date: November 9, 2023Applicant: GLOBALWAFERS CO., LTD.Inventors: PO-JUNG LIN, HAN-ZONG WU
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Publication number: 20230360910Abstract: A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon carbide (SiC) substrate, wherein a silicon face (Si-face) of the SiC substrate is taken as a growth face, and the growth face has an off-angle relative to the Si-face of the SiC substrate; B: deposit a nitride angle adjustment layer on the growth face of the SiC substrate through physical vapor deposition (PVD); C: deposit a first group III nitride layer on the nitride angle adjustment layer; and D: deposit a second group III nitride layer on the first group III nitride layer. Through the method of manufacturing the epitaxial structure, when the silicon face of the silicon carbide substrate has the off-angle, the problem of a poor epitaxial quality of the first group III nitride layer and a poor epitaxial quality of the second group III nitride layer could be effectively relieved.Type: ApplicationFiled: February 1, 2023Publication date: November 9, 2023Applicant: GLOBALWAFERS CO., LTD.Inventors: PO-JUNG LIN, HAN-ZONG WU
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Publication number: 20230126461Abstract: A method for calculating an object pick-and-place sequence and an electronic apparatus for automatic storage pick-and-place are provided. When a warehousing operation is to be performed, the following steps are performed. A weight of an object to be stocked that is to be put on a shelf is obtained. The weight is substituted into a plurality of coordinate positions corresponding to a plurality of unused grid positions respectively, so as to calculate a plurality of estimated center of gravity positions. Whether the estimated center of gravity positions are located within a balance standard area is determined so as to sieve out a plurality of candidate grid positions from these unused grid positions. One of the candidate grid positions is selected as a recommended position of the object to be stocked.Type: ApplicationFiled: July 13, 2022Publication date: April 27, 2023Applicant: GlobalWafers Co., Ltd.Inventors: Chia-Lin Li, Shang-Chi Wang, Chi Yuan Hsu, Han-Zong Wu
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Publication number: 20230126487Abstract: Provided is a wafer jig including a bottom wall and a ring-shaped side wall. The bottom wall has a supporting surface. The ring-shaped side wall is connected to a periphery of the bottom wall. The ring-shaped side wall includes at least two step portions. The two step portions include a first step portion and a second step portion. The first step portion is connected between the supporting surface and the second step portion, and the first step portion protrudes along a direction toward a center of the bottom wall. The ring-shaped side wall surrounds the center. In addition, a wafer structure and a wafer processing method are also provided.Type: ApplicationFiled: July 6, 2022Publication date: April 27, 2023Applicant: GlobalWafers Co., Ltd.Inventors: Chan-Ju Wen, Chia-Chi Tsai, Han-Zong Wu
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Publication number: 20230011749Abstract: A wafer includes a semiconductor substrate. The semiconductor substrate includes a plurality of first doped regions and a plurality of second doped regions. The first doped regions and the second doped regions are located on a first surface of the semiconductor substrate. The second doped regions contact the first doped regions. The first doped regions and the second doped regions are alternately arranged. Both of the first doped regions and the second doped regions include a plurality of N-type dopants. The doping concentration of the N-type dopants in each of the first doped regions is not greater than the doping concentration of the N-type dopants in each of the second doped regions.Type: ApplicationFiled: February 14, 2022Publication date: January 12, 2023Applicant: GlobalWafers Co., Ltd.Inventors: Chenghan Tsao, Han-Zong Wu
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Publication number: 20220326162Abstract: A wafer processing system and a rework method thereof are provided. An image capture device captures an image of a wafer to generate a captured image. A control device detects a defect pattern in the captured image, calculates a target removal thickness according to distribution of contrast values of the defect pattern, and controls a processing device to perform processing on the wafer according to the target removal thickness.Type: ApplicationFiled: January 6, 2022Publication date: October 13, 2022Applicant: GlobalWafers Co., Ltd.Inventors: Shang-Chi Wang, Cheng-Jui Yang, Miao-Pei Chen, Han-Zong Wu
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Publication number: 20220316872Abstract: The disclosure provides a wafer inspection method and wafer inspection apparatus. The method includes: receive scanning information of at least one wafer, wherein the scanning information includes a plurality of haze values; the scanning information is divided into a plurality of information blocks according to the unit block, and the feature value of each the plurality of information blocks is calculated according to the plurality of haze values included in each the plurality of information blocks; and converting the feature value into a color value according to the haze upper threshold and the haze lower threshold, and generating the color value corresponding to the at least one wafer according to the converted color value according to the feature value, the color graph displays the texture content of the at least one wafer.Type: ApplicationFiled: January 27, 2022Publication date: October 6, 2022Applicant: GlobalWafers Co., Ltd.Inventors: Shang-Chi Wang, Miao-Pei Chen, Han-Zong Wu, Chia-Chi Tsai, I-Ching Li
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Publication number: 20220307991Abstract: A wafer surface defect inspection method and a wafer surface defect inspection apparatus are provided. The method includes the following steps. Scanning information of a wafer is received, and the scanning information includes multiple scanning parameters. At least one reference point of the scanning information is determined, and path information is generated according to the at least one reference point and a reference value. Multiple first scanning parameters corresponding to the path information in the scanning parameters are obtained according to the path information to generate a curve chart. According to the curve chart, it is determined whether the wafer has a defect, and a defect type of the defect is determined.Type: ApplicationFiled: January 13, 2022Publication date: September 29, 2022Applicant: GlobalWafers Co., Ltd.Inventors: Shang-Chi Wang, Miao-Pei Chen, Han-Zong Wu, Chia-Chi Tsai, I-Ching Li
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Patent number: 11094052Abstract: A method of counting sheet materials applied to a pile of sheet materials, comprising the steps of: receiving an image of the pile of sheet materials; obtaining a grayscale value of a plurality of pixels along a first image axis direction of the image to form an one dimensional first array; performing binarization of the first elements of the first array with a first threshold value to form an one dimensional second array; obtaining the number of the second elements of a first value appearing between two second elements of a second value in the second array to form a third array; dividing the elements of the third array into a first cluster and a second cluster with a second threshold value; counting the number of the third elements belonging to the first cluster and defining said number as the number of the first sheet materials.Type: GrantFiled: June 23, 2020Date of Patent: August 17, 2021Assignee: GLOBALWAFERS CO., LTD.Inventors: Wei-Cheng Chang, Chia-Yeh Lee, Han-Zong Wu
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Publication number: 20210012481Abstract: A method of counting sheet materials applied to a pile of sheet materials, comprising the steps of: receiving an image of the pile of sheet materials; obtaining a grayscale value of a plurality of pixels along a first image axis direction of the image to form an one dimensional first array; performing binarization of the first elements of the first array with a first threshold value to form an one dimensional second array; obtaining the number of the second elements of a first value appearing between two second elements of a second value in the second array to form a third array; dividing the elements of the third array into a first cluster and a second cluster with a second threshold value; counting the number of the third elements belonging to the first cluster and defining said number as the number of the first sheet materials.Type: ApplicationFiled: June 23, 2020Publication date: January 14, 2021Applicant: GLOBALWAFERS CO., LTD.Inventors: WEI-CHENG CHANG, CHIA-YEH LEE, HAN-ZONG WU