Patents by Inventor Hanchi Huang

Hanchi Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6725061
    Abstract: A wireless communication device having an accessory port and a processor to detect when an external accessory is coupled to the accessory port, and then identify the type of external accessory. A data line connects the external accessory to the wireless communication device, the data line being a portion of a pulse code modulation (PCM) port in the accessory port. The processor senses activity on this data line, including a signal transmitted by the external accessory indicative of when the external accessory is coupled to the wireless communication device. The processor further senses identification data associated with the external accessory, with the identification data including an identification code of the external accessory. The processor generates a clock signal, and the external accessory transmits the identification data to the wireless communication device over the data line in response to the clock signal. In this fashion, the processor repeatedly senses the transmitted identification data.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: April 20, 2004
    Assignee: Qualcomm, Incorporated
    Inventors: James A. Hutchison, IV, Steven C. Den Beste, Hanchi Huang
  • Patent number: 4965579
    Abstract: A parallel analog-to-digital ("A/D") converter utilizing only N comparators and at least N-1 summing networks made of the simple resistance elements. The A/D conversion process operates asynchronously without need for registers, a clock circuit or latches and determines at a high rate of speed the N output bits for a given analog input signal. Each of the summing networks produces a composite analog signal which is fed into a respective one of the comparators. The digital output bit produced by each comparator is fed into the summing networks associated with those comparators whose output bits are less significant. Accordingly, when all output bits are changing on account of a new analog input value, the converter determines the most significant bit first, the next most significant bit next, and so on, until the least significant bit is determined.
    Type: Grant
    Filed: November 28, 1988
    Date of Patent: October 23, 1990
    Assignee: The Board of Governors of Wayne State University
    Inventors: Gang Liu, Hanchi Huang, Pepe Siy, Michael P. Polis