Patents by Inventor Haneol JANG

Haneol JANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11715525
    Abstract: A nonvolatile memory device includes a memory block including a first structure formed on a substrate and a second structure formed on the first structure. An erase method of the nonvolatile memory device includes applying a word line erase voltage to first normal word lines of the first structure and second normal word lines of the second structure, and applying a junction word line erase voltage smaller than the word line erase voltage to at least one of a first junction word line of the first structure and a second junction word line of the second structure. The first junction word line is a word line adjacent to the second structure from among word lines of the first structure, and the second junction word line is a word line adjacent to the first structure from among word lines of the second structure.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: August 1, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun-Ho Seo, Yong-Lae Kim, Haneol Jang, Hyukje Kwon, Sang-Wan Nam
  • Patent number: 11682460
    Abstract: A program method of a nonvolatile memory device including receiving a write address and write data, generating a seed corresponding to the write address, generating a random sequence by using the seed, randomizing the write data by using the random sequence, and programming the randomized write data to a memory area corresponding to the write address may be provided. The seed may provide state shaping variable depending on a location of a word line, at which the received write data is to be programmed.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: June 20, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-ho Seo, Sangwon Hwang, Suk-Eun Kang, Haneol Jang, Youngwook Jeong, Wanha Hwang
  • Publication number: 20220230687
    Abstract: A program method of a nonvolatile memory device including receiving a write address and write data, generating a seed corresponding to the write address, generating a random sequence by using the seed, randomizing the write data by using the random sequence, and programming the randomized write data to a memory area corresponding to the write address may be provided. The seed may provide state shaping variable depending on a location of a word line, at which the received write data is to be programmed.
    Type: Application
    Filed: April 6, 2022
    Publication date: July 21, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-ho SEO, Sangwon HWANG, Suk-Eun KANG, Haneol JANG, Youngwook JEONG, Wanha HWANG
  • Patent number: 11322208
    Abstract: A program method of a nonvolatile memory device including receiving a write address and write data, generating a seed corresponding to the write address, generating a random sequence by using the seed, randomizing the write data by using the random sequence, and programming the randomized write data to a memory area corresponding to the write address may be provided. The seed may provide state shaping variable depending on a location of a word line, at which the received write data is to be programmed.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: May 3, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-ho Seo, Sangwon Hwang, Suk-Eun Kang, Haneol Jang, Youngwook Jeong, Wanha Hwang
  • Publication number: 20220059168
    Abstract: A nonvolatile memory device includes a memory block including a first structure formed on a substrate and a second structure formed on the first structure. An erase method of the nonvolatile memory device includes applying a word line erase voltage to first normal word lines of the first structure and second normal word lines of the second structure, and applying a junction word line erase voltage smaller than the word line erase voltage to at least one of a first junction word line of the first structure and a second junction word line of the second structure. The first junction word line is a word line adjacent to the second structure from among word lines of the first structure, and the second junction word line is a word line adjacent to the first structure from among word lines of the second structure.
    Type: Application
    Filed: August 23, 2021
    Publication date: February 24, 2022
    Inventors: JUN-HO SEO, YONG-LAE KIM, HANEOL JANG, HYUKJE KWON, SANG-WAN NAM
  • Publication number: 20210225451
    Abstract: A program method of a nonvolatile memory device including receiving a write address and write data, generating a seed corresponding to the write address, generating a random sequence by using the seed, randomizing the write data by using the random sequence, and programming the randomized write data to a memory area corresponding to the write address may be provided. The seed may provide state shaping variable depending on a location of a word line, at which the received write data is to be programmed.
    Type: Application
    Filed: November 16, 2020
    Publication date: July 22, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jun-ho SEO, Sangwon HWANG, Suk-Eun KANG, Haneol JANG, Youngwook JEONG, Wanha HWANG