Patents by Inventor HANG DONG

HANG DONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250173638
    Abstract: A schedule planning apparatus plans, based on a plurality of parameter values, a schedule combination including a transportation schedule and a charging schedule, evaluates, for each of the one or the plurality of planned schedule combinations, efficiency of transportation and easiness of schedule correction, and outputs information based on at least a part of a schedule combination in which the efficiency and the correction easiness are relatively high. For each of one or a plurality of kinds of constraint parameter value combinations, the constraint parameter value combination is a combination including a plurality of constraint parameter values respectively corresponding to the plurality of constraint parameter names. A constraint parameter value of at least one constraint parameter name affects the correction easiness.
    Type: Application
    Filed: October 17, 2024
    Publication date: May 29, 2025
    Inventors: Akane SETO, Junko HOSODA, Kazuya UYAMA, Hang DONG
  • Publication number: 20250173827
    Abstract: The present disclosure relates to the technical field of image processing. Provided in the embodiments of the present disclosure are a video super-resolution method and apparatus. The method includes: separately decomposing into N image blocks the t-th image frame of a video to be subjected to super-resolution and a neighborhood image frame of the t-th image frame; generating N image block sequences; computing motion parameters of each image block sequence; according to the motion parameters of each image block sequence, determining a super-resolution network model corresponding to each image block sequence; using the corresponding super-resolution network model to perform super-resolution on the image block of the t-th image frame in each image block sequence, to obtain super-resolution image blocks of the t-th image frame; and according to the super-resolution image blocks of the t-th image frame, generating a super-resolution image frame of the t-th image frame.
    Type: Application
    Filed: March 17, 2023
    Publication date: May 29, 2025
    Inventor: Hang DONG
  • Publication number: 20250162875
    Abstract: Provided is a negative electrode material and a preparation method thereof, and a battery. The negative electrode material includes a core and a coating layer located on at least partial surface of the core. The core includes graphite, the coating layer includes a carbon material, and a surface of the graphite and/or the coating layer includes nitrogen atoms. Uniformity of a doping concentration of the nitrogen atoms is A, and A?0.5. According to the negative electrode material provided in the present disclosure, the uniform doping of the nitrogen atoms can adjust an energy band structure of a graphite negative electrode material.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Applicant: BTR NEW MATERIAL GROUP CO., LTD.
    Inventors: Hang DONG, Tao XU, Haihui ZHOU, Peng HE, Jianguo REN, Xueqin HE
  • Publication number: 20250078207
    Abstract: The embodiments of the present disclosure relate to a video frame repair method, apparatus, device, storage medium, and program product. The method comprises: acquiring a video frame group from a video, wherein the video frame group comprises the target video frame and video frames adjacent to the target video frame; inputting the video frame group into an attention transformation network to obtain a video frame group to be fused, wherein the attention transformation network comprises a set of attention transformation modules that are connected in series, an input of the attention transformation network is an input of a first attention transformation module in the set, and the video frame group comprises a video frame that is output by one or more-attention transformation modules and corresponds to the target video frame; and processing the video frame group to be fused to obtain a repaired target video frame.
    Type: Application
    Filed: December 27, 2022
    Publication date: March 6, 2025
    Inventor: Hang DONG
  • Publication number: 20250061541
    Abstract: Embodiments of the present disclosure relate to the technical field of image processing, and provide a video super-resolution method and device. The method includes: decomposing a target image frame of a video to be super-resolved into a plurality of image blocks; obtaining a super-resolution feature of the target image frame according to the plurality of image blocks and image blocks obtained by decomposing the other image frames in the video to be super-resolved; and obtaining, according to the super-resolution feature of the target image frame, a super-resolution image frame corresponding to the target image frame.
    Type: Application
    Filed: March 16, 2023
    Publication date: February 20, 2025
    Inventor: Hang DONG
  • Publication number: 20250061686
    Abstract: Embodiments of the present disclosure relate to the technical field of image processing, and provide an image processing method and apparatus. The method includes: respectively performing feature extraction on an image to be processed from a plurality of different spatial scales to obtain a target feature and at least one feature to be fused; fusing the target feature and the at least one feature to be fused to obtain a first feature; extracting a high-frequency feature and a low-frequency feature from the target feature; processing the high-frequency feature on the basis of a residual dense block (RDB) to obtain a second feature; fusing the low-frequency feature and the at least one feature to be fused to obtain a third feature; combining the first feature, the second feature and the third feature to obtain a fused feature; and processing the image to be processed on the basis of the fused feature.
    Type: Application
    Filed: December 27, 2022
    Publication date: February 20, 2025
    Inventor: Hang DONG
  • Publication number: 20250046254
    Abstract: A display panel and a display device. The display panel comprises: a substrate, a display area (100) provided with at least one light-emitting signal line (E), at least one first reset signal line (R) and sub-pixels arranged in an array, at least one sub-pixel (P1, P2, P3) comprising: a light-emitting device (L) and a pixel circuit. The first reset signal line (R) is configured to provide a reset control signal for the pixel circuit, the light-emitting signal line is configured to provide a light-emitting control signal for the pixel circuit to provide a driving current. For the first reset signal line and the light-emitting signal line connected to a same pixel circuit, the duration in which the signal of the light-emitting signal line is an invalid level signal is equal to the duration in which the signal of the first reset signal line is a valid level signal.
    Type: Application
    Filed: October 23, 2024
    Publication date: February 6, 2025
    Inventors: Hongting LU, Hang DONG, Xing HUANG, Xingyu CHEN, Lian XIANG, Yanping REN, Xueying HE, Changlong YUAN
  • Publication number: 20250022096
    Abstract: Embodiments of the present disclosure relate to a GAN-based super-resolution image processing method and apparatus, a device, and a medium.
    Type: Application
    Filed: November 25, 2022
    Publication date: January 16, 2025
    Inventor: Hang DONG
  • Patent number: 12200336
    Abstract: A portable electronic device, and an image-capturing device and an assembly method thereof are provided. The image-capturing device includes a carrier substrate, an image sensing chip, a filter element and a lens assembly. The carrier substrate has a through opening and a recessed space. The image sensing chip is disposed on the bottom side of the carrier substrate. The filter element is disposed in the recessed space of the carrier substrate, so that all or a part of the filter element is accommodated in the through opening. When at least one microparticle with a maximum particle size between 5 ?m and 25 ?m is located on the filter element, a shortest distance between the filter element and the image sensing chip is between 30 ?m and 200 ?m, so that the image sensing chip cannot capture a light spot generated due to blocking of the microparticle.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: January 14, 2025
    Assignee: Shine Optics Technology Company Limited
    Inventors: Jie-Qiao Lin, Li-Hsueh Chan, Feng Zhou, Kung-An Lin, Hang Dong
  • Patent number: 12175939
    Abstract: The present disclosure provides a driving method, and relates to a field of display technology. The driving method is used to drive a pixel array, and the driving method includes operation to operation: in operation, setting a timing of a gate driving signal (Gate) based on an effective time difference between a data signal (Vdata) and an effective signal of the gate driving signal (Gate); and in operation, driving the pixel array by using the gate driving signal (Gate). The present disclosure further provides a display device.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: December 24, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventor: Hang Dong
  • Patent number: 12165593
    Abstract: A display panel and a display device. The display panel comprises: a substrate, a display area (100) provided with at least one light-emitting signal line (E), at least one first reset signal line (R) and sub-pixels arranged in an array, at least one sub-pixel (P1, P2, P3) comprising: a light-emitting device (L) and a pixel circuit. The first reset signal line (R) is configured to provide a reset control signal for the pixel circuit, the light-emitting signal line is configured to provide a light-emitting control signal for the pixel circuit to provide a driving current. For the first reset signal line and the light-emitting signal line E connected to a same pixel circuit, the duration in which the signal of the light-emitting signal line is an invalid level signal is equal to the duration in which the signal of the first reset signal line is a valid level signal.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: December 10, 2024
    Assignees: Beijing BOE Technology Development Co., Ltd., Chengdu BOE Optoelectronics Technology Co., Ltd.
    Inventors: Hongting Lu, Hang Dong, Xing Huang, Xingyu Chen, Lian Xiang, Yanping Ren, Xueying He, Changlong Yuan
  • Publication number: 20240404007
    Abstract: Embodiments of the present invention provide a video super-resolution method and apparatus, the method including: acquiring a first feature; processing the first feature by concatenated multistage residual dense blocks (RDBs) to obtain a fusion feature output by a RDB in each stage; for the fusion feature output by the RDB in each stage, aligning each of neighborhood features of the fusion feature with a target feature of the fusion feature to obtain an alignment feature corresponding to the RDB that outputs the fusion feature; and generating a super-resolution video frame corresponding to the target video frame on the basis of the alignment feature corresponding to the RDB in each stage and the initial feature of the target video frame.
    Type: Application
    Filed: October 27, 2022
    Publication date: December 5, 2024
    Inventor: Hang DONG
  • Publication number: 20240312414
    Abstract: A display panel and a display device. The display panel comprises: a substrate, a display area (100) provided with at least one light-emitting signal line (E), at least one first reset signal line (R) and sub-pixels arranged in an array, at least one sub-pixel (P1, P2, P3) comprising: a light-emitting device (L) and a pixel circuit. The first reset signal line (R) is configured to provide a reset control signal for the pixel circuit, the light-emitting signal line is configured to provide a light-emitting control signal for the pixel circuit to provide a driving current. For the first reset signal line and the light-emitting signal line connected to a same pixel circuit, the duration in which the signal of the light-emitting signal line is an invalid level signal is equal to the duration in which the signal of the first reset signal line is a valid level signal.
    Type: Application
    Filed: July 21, 2022
    Publication date: September 19, 2024
    Inventors: Hongting LU, Hang DONG, Xing HUANG, Xingyu CHEN, Lian XIANG, Yanping REN, Xueying HE, Changlong YUAN
  • Publication number: 20240273852
    Abstract: An image alignment method and device, relating to the technical field of image processing. The method comprises: obtaining a target feature comprising feature points corresponding to pixel points in a target image and a reference feature comprising feature points corresponding to pixel points in a reference image; obtaining a similarity feature according to the target feature and the reference feature, the similarity feature comprising the similarity between the feature points in the target feature and a corresponding related feature point; predicting a convolutional layer according to the similarity feature, the target feature, and an offset, and obtaining an offset of the target feature and the reference feature; and aligning the reference feature with the target feature according to the offset and the deformable convolutional layer.
    Type: Application
    Filed: May 19, 2022
    Publication date: August 15, 2024
    Inventor: Hang DONG
  • Publication number: 20240274087
    Abstract: A scan circuit having a plurality of stages is provided. A respective scan unit of the scan circuit in the respective stage of the plurality of stages includes an input subcircuit, an output subcircuit, a first processing subcircuit, a second processing subcircuit, and a third processing subcircuit. The respective scan unit includes a first capacitor in the second processing subcircuit; a third capacitor in the third processing subcircuit; an eighth transistor in the first processing subcircuit; and a ninth transistor and a tenth transistor in the output subcircuit. Along the first direction, the eighth transistor is on a side of the ninth transistor and the tenth transistor away from the first capacitor, the third capacitor, and other transistors of the respective scan unit.
    Type: Application
    Filed: April 28, 2022
    Publication date: August 15, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventor: Hang Dong
  • Publication number: 20240256362
    Abstract: The present disclosure relates to systems, methods, and computer readable media for predicting surplus capacity on a set of server nodes and determining a quantity of deferrable virtual machines (VMs) that may be scheduled over an upcoming period of time. This determination of VM quantity may be determined while minimizing risks associated with allocation failures on the set of server nodes. This disclosure described systems that facilitate features and functionality related to improving utilization of surplus resource capacity on a plurality of server nodes by implementing VMs having some flexibility in timing of deployment while also avoiding significant risk caused as a result of over-allocated storage and computing resources. In one or more embodiments, the quantity of deferrable VMs is determined and scheduled in accordance with rules of a scheduling policy.
    Type: Application
    Filed: April 10, 2024
    Publication date: August 1, 2024
    Inventors: Yuwen YANG, Gurpreet VIRDI, Bo QIAO, Hang DONG, Karthikeyan SUBRAMANIAN, Marko LALIC, Shandan ZHOU, Si QIN, Thomas MOSCIBRODA, Yunus MOHAMMED
  • Patent number: 12048177
    Abstract: An OLED light emitting device, a method for fabricating an OLED light emitting device and a lamp device. The OLED light emitting device includes: a substrate; a plurality of organic light emitting diodes, wherein the plurality of organic light emitting diodes are located on a same one side of the substrate; and a plurality of regulating resistors, wherein the regulating resistors are connected to the organic light emitting diodes; wherein areas of luminescent layers of the plurality of organic light emitting diodes are not completely equal.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: July 23, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wenkang Wang, Hang Dong
  • Publication number: 20240144886
    Abstract: The present disclosure provides a driving method, and relates to a field of display technology. The driving method is used to drive a pixel array, and the driving method includes operation to operation: in operation, setting a timing of a gate driving signal (Gate) based on an effective time difference between a data signal (Vdata) and an effective signal of the gate driving signal (Gate); and in operation, driving the pixel array by using the gate driving signal (Gate). The present disclosure further provides a display device.
    Type: Application
    Filed: April 29, 2022
    Publication date: May 2, 2024
    Inventor: Hang Dong
  • Patent number: 11972301
    Abstract: The present disclosure relates to systems, methods, and computer readable media for predicting surplus capacity on a set of server nodes and determining a quantity of deferrable virtual machines (VMs) that may be scheduled over an upcoming period of time. This determination of VM quantity may be determined while minimizing risks associated with allocation failures on the set of server nodes. This disclosure described systems that facilitate features and functionality related to improving utilization of surplus resource capacity on a plurality of server nodes by implementing VMs having some flexibility in timing of deployment while also avoiding significant risk caused as a result of over-allocated storage and computing resources. In one or more embodiments, the quantity of deferrable VMs is determined and scheduled in accordance with rules of a scheduling policy.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: April 30, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Yuwen Yang, Gurpreet Virdi, Bo Qiao, Hang Dong, Karthikeyan Subramanian, Marko Lalic, Shandan Zhou, Si Qin, Thomas Moscibroda, Yunus Mohammed
  • Patent number: 11939473
    Abstract: A thermoplastic vulcanizate composition comprises: (i) a dispersed phase of rubber that is at least partially cured; (ii) a continuous thermoplastic phase including at least one thermoplastic polymer; (iii) a first polysiloxane composition comprising a migratory siloxane polymer physically dispersed in a first thermoplastic material and (iv) a second polysiloxane composition comprising a non-migratory, siloxane polymer bonded to a second thermoplastic material.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: March 26, 2024
    Assignee: Celanese International Corporation
    Inventors: Prashant Bhadane, Chad Michael Houghton, Oscar Oansuk Chung, Eric Paul Jourdain, Hang Dong