Patents by Inventor Hang FAN
Hang FAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240117391Abstract: Provided is an engineered bacterium for producing nervonic acid and/or grease. The genome of the engineering bacterium is integrated with an expression cassette expressing a protein encoded by 3-ketoacyl-CoA synthase (KCS) gene and/or an exterase gene.Type: ApplicationFiled: November 18, 2021Publication date: April 11, 2024Applicants: QINGDAO INSTITUTE OF BIOENERGY AND BIOPROCESS TECHNOLOGY, CHINESE ACADEMY OF SCIENCES, ZHEJIANG ZHENYUAN BIOTECH CO., LTD.Inventors: Shian Wang, Jianchang Ruan, Fuli Li, Hang Su, Weiming Fan, Xingfeng Han, Ziyue Meng, Penghui Shi
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Publication number: 20240091170Abstract: Provided are catechol nanoparticles, catechol protein nanoparticles, and a preparation method and use thereof. The method includes: adding a tannin compound-containing natural herb medicine into water to obtain a mixture, and subjecting the mixture to heating reflux extraction to obtain a herb medicine extract and subjecting the herb medicine extract to fractionation to obtain the catechol nanoparticles.Type: ApplicationFiled: August 1, 2023Publication date: March 21, 2024Applicant: Shihezi UniversityInventors: Bo HAN, Jingmin Fan, Hang Yu, Rui Xue, Jiawei Guan, Yu Xu, Linyun He, Ji Liu, Chengyu Jiang, Xin Lu, Xiangze Kong, Wei Yu, Wen Chen
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Patent number: 11923905Abstract: The present application relates to a distributed antenna system, a method and an apparatus. The distributed antenna system comprises a digital-analog expansion unit and a remote cascade chain, the remote cascade chain comprising multiple remote units cascadingly connected by means of radio frequency cable, and a first remote unit of the remote cascade chain being connected to the digital-analog expansion unit by means of radio frequency cable. The digital-analog expansion unit is used to perform a baseband processing operation on a received external signal, and to perform interconversion of an analog RF signal and a digital RF signal.Type: GrantFiled: November 27, 2019Date of Patent: March 5, 2024Assignee: COMBA NETWORK SYSTEMS COMPANY LIMITEDInventors: Manjiang Luo, Qiyan Fan, Hang Zhang
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Publication number: 20230378323Abstract: A semiconductor device includes a doped region of a first conductivity type in a substrate, a source/drain region of the first conductivity in the doped region, and a gate structure overlapping a portion of the doped region. The semiconductor device further comprises a multi-layer spacer over a first sidewall of the gate structure. The multi-layer spacer comprises a first spacer layer, a second spacer layer over the first spacer layer, and a third spacer layer over the second spacer layer. The first spacer layer and the second spacer layer are in contact with the first sidewall of the gate structure.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Feng HAN, Lei SHI, Hung-Chih TSAI, Liang-Yu SU, Hang FAN
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Publication number: 20230335636Abstract: A high-frequency LDMOS device includes a semiconductor substrate of a first conductivity type, a doped drift region of a second conductivity type formed on the substrate, and a body region of the first conductivity type formed in the doped drift region. Source and drain regions of the second conductivity type are formed proximate an upper surface of the body region and doped drift region, respectively, and spaced laterally from one another. A first insulating layer is formed on the body and doped drift regions. A gate structure including multiple gate segments is formed on the first insulating layer. Each of the gate segments is spaced laterally from one another by a second insulating layer disposed between adjacent gate segments. A spacing between adjacent gate segments is controlled as a function of a thickness of the second insulating layer, a thickness of the first and second insulating layers being independently controlled.Type: ApplicationFiled: August 17, 2022Publication date: October 19, 2023Inventors: Lei SHI, Jian WU, Hang Fan, Luyao Song, Shuming XU
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Publication number: 20230317719Abstract: A semiconductor structure includes at least a first chip, the first chip comprising a semiconductor substrate and an active layer formed on an upper surface of the substrate, one or more lateral metal-oxide semiconductor devices being formed in the active layer of the first chip. The semiconductor structure further includes at least a first integrated capacitor disposed on a back-side of the semiconductor substrate of the first chip. The first integrated capacitor includes a first conductive layer in electrical connection with the back-side of the substrate, an insulating layer formed on at least a portion of an upper surface of the first conductive layer, and a second conductive layer formed on at least a portion of an upper surface of the insulating layer.Type: ApplicationFiled: July 15, 2022Publication date: October 5, 2023Applicant: SHANGHAI BRIGHT POWER SEMICONDUCTOR CO., LTD.Inventors: Luyao Song, Hang Fan, Jian Wu, Lei Shi, Shuming Xu
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Patent number: 11764288Abstract: A method includes forming a body region of a first conductivity type and a doped region of a second conductivity type in a semiconductor substrate; forming a gate structure the substrate, and first gate spacers respectively on first and second sides of the gate structure; depositing a second spacer layer and a third spacer layer over the gate structure; patterning the third spacer layer into third gate spacers respectively on the first and second sides of the gate structure; removing a first one of the third gate spacers from the first side of the gate structure, while leaving a second one of the third gate spacers on the second side of the gate structure; and patterning the second spacer layer into a second gate spacer by using the second one of the third gate spacers as an etching mask.Type: GrantFiled: June 30, 2022Date of Patent: September 19, 2023Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Feng Han, Lei Shi, Hung-Chih Tsai, Liang-Yu Su, Hang Fan
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Patent number: 11764572Abstract: A device includes an electrostatic discharge (ESD) protection switch and an ESD driver. The ESD driver is configured to receive a first voltage at a first terminal and receive a second voltage at a second terminal and includes a first trigger circuit and a first resistor. The first trigger circuit includes a first input terminal and a first output terminal. The first input terminal is configured to receive the first voltage. The first resistor is coupled between the first output terminal and the second terminal. When the first voltage received at the first terminal is a first overvoltage and a voltage difference between the first voltage and the second voltage is higher than a first voltage threshold, the ESD driver outputs a first trigger signal to turn on the ESD protection switch.Type: GrantFiled: July 22, 2022Date of Patent: September 19, 2023Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Hang Fan, Ming-Fang Lai, Shui-Ming Cheng
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Publication number: 20230207694Abstract: A semiconductor device includes a substrate, a first well region in the substrate, a gate structure over the substrate, a second well region and a third well region in the substrate and under the gate structure, and a source region and a drain region on opposite sides of the gate structure. The drain region is in the second well region and the source region is in the third well region. The drain region has a first doped region and a second doped region, and the first doped region and the second doped region have different conductivity types.Type: ApplicationFiled: March 14, 2022Publication date: June 29, 2023Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC China Company LimitedInventors: Hang FAN, Feng HAN, Zheng Long CHEN, Jian-Hua LU
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Publication number: 20230102053Abstract: A radio frequency (RF) switch device includes a semiconductor substrate, doped with an impurity of a first conductivity type at a first doping concentration level, and a mesa extending vertically from an upper surface of the substrate and formed contiguous therewith. The mesa includes a drift region doped with the impurity of the first conductivity type at a second doping concentration level, the second doping concentration level being less than the first doping concentration level. The mesa forms a primary current conduction path in the RF switch device. The RF switch device further includes an insulator layer disposed on at least a portion of the upper surface of the substrate and sidewalls of the mesa, and at least one gate disposed on at least a portion of an upper surface of the insulator layer, the gate at least partially surrounding the mesa.Type: ApplicationFiled: November 10, 2021Publication date: March 30, 2023Applicant: Powerlite Semiconductor (Shanghai) Co., LtdInventors: Shuming Xu, Hang Fan
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Patent number: 11525947Abstract: Provided is a Fresnel lens and display device with such Fresnel lens, the Fresnel lens includes an entrance plane and an exit plane with multiple bump units. The bump units include a First Bump Unit, a Second Bump Unit, and a Third Bump Unit; on one side of the central axis of said lens, the First Bump Unit, Second Bump Unit and Third Bump Unit are placed successively along the radiation direction from the central axis toward the lens edge; on the other side of the central axis of said lens, the First Bump Unit, Second Bump Unit and Third Bump Unit are also placed successively along the radiation direction from the central axis toward the lens edge. The Bump Units on both sides of the central axis of the lens are symmetrical.Type: GrantFiled: September 27, 2021Date of Patent: December 13, 2022Assignee: GUANGZHOU MID TECHNOLOGY CO., LTD.Inventors: Kunyang Li, Di Pan, Yuqiao Xian, Hang Fan, Weitang Liang
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Publication number: 20220360073Abstract: A device includes an electrostatic discharge (ESD) protection switch and an ESD driver. The ESD driver is configured to receive a first voltage at a first terminal and receive a second voltage at a second terminal and includes a first trigger circuit and a first resistor. The first trigger circuit includes a first input terminal and a first output terminal. The first input terminal is configured to receive the first voltage. The first resistor is coupled between the first output terminal and the second terminal. When the first voltage received at the first terminal is a first overvoltage and a voltage difference between the first voltage and the second voltage is higher than a first voltage threshold, the ESD driver outputs a first trigger signal to turn on the ESD protection switch.Type: ApplicationFiled: July 22, 2022Publication date: November 10, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Hang FAN, Ming-Fang LAI, Shui-Ming CHENG
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Publication number: 20220336638Abstract: A method includes forming a body region of a first conductivity type and a doped region of a second conductivity type in a semiconductor substrate; forming a gate structure the substrate, and first gate spacers respectively on first and second sides of the gate structure; depositing a second spacer layer and a third spacer layer over the gate structure; patterning the third spacer layer into third gate spacers respectively on the first and second sides of the gate structure; removing a first one of the third gate spacers from the first side of the gate structure, while leaving a second one of the third gate spacers on the second side of the gate structure; and patterning the second spacer layer into a second gate spacer by using the second one of the third gate spacers as an etching mask.Type: ApplicationFiled: June 30, 2022Publication date: October 20, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Feng HAN, Lei SHI, Hung-Chih TSAI, Liang-Yu SU, Hang FAN
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Patent number: 11418025Abstract: A device is disclosed herein. The device includes an electrostatic discharge (ESD) protection switch and an ESD driver. The ESD driver is configured to receive a first voltage and a second voltage. When a voltage difference between the first voltage and the second voltage is higher than a first voltage threshold, the ESD driver outputs a first trigger signal to turn on the ESD protection switch. When the voltage difference between the first voltage and the second voltage is lower than a second voltage threshold, the ESD driver outputs a second trigger signal to turn on the ESD protection switch.Type: GrantFiled: November 23, 2020Date of Patent: August 16, 2022Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Hang Fan, Ming-Fang Lai, Shui-Ming Cheng
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Patent number: 11380779Abstract: A semiconductor device includes a gate structure, a double diffused region, a source region, a drain region, a first gate spacer, and a second gate spacer. The gate structure is over a semiconductor substrate. The double diffused region is in the semiconductor substrate and laterally extends past a first side of gate structure. The source region is in the semiconductor substrate and is adjacent a second side of the gate structure opposite the first side. The drain region is in the double diffused region in the semiconductor substrate and is of a same conductivity type as the double diffused region. The first gate spacer is on the first side of the gate structure. The second gate spacer extends upwardly from the double diffused region along an outermost sidewall of the first gate spacer and terminates prior to reaching a top surface of the gate structure.Type: GrantFiled: September 30, 2020Date of Patent: July 5, 2022Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Feng Han, Lei Shi, Hung-Chih Tsai, Liang-Yu Su, Hang Fan
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Publication number: 20220140599Abstract: A device is disclosed herein. The device includes an electrostatic discharge (ESD) protection switch and an ESD driver. The ESD driver is configured to receive a first voltage and a second voltage. When a voltage difference between the first voltage and the second voltage is higher than a first voltage threshold, the ESD driver outputs a first trigger signal to turn on the ESD protection switch. When the voltage difference between the first voltage and the second voltage is lower than a second voltage threshold, the ESD driver outputs a second trigger signal to turn on the ESD protection switch.Type: ApplicationFiled: November 23, 2020Publication date: May 5, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Hang FAN, Ming-Fang LAI, Shui-Ming CHENG
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Publication number: 20220069107Abstract: A semiconductor device includes a gate structure, a double diffused region, a source region, a drain region, a first gate spacer, and a second gate spacer. The gate structure is over a semiconductor substrate. The double diffused region is in the semiconductor substrate and laterally extends past a first side of gate structure. The source region is in the semiconductor substrate and is adjacent a second side of the gate structure opposite the first side. The drain region is in the double diffused region in the semiconductor substrate and is of a same conductivity type as the double diffused region. The first gate spacer is on the first side of the gate structure. The second gate spacer extends upwardly from the double diffused region along an outermost sidewall of the first gate spacer and terminates prior to reaching a top surface of the gate structure.Type: ApplicationFiled: September 30, 2020Publication date: March 3, 2022Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITEDInventors: Feng HAN, Lei SHI, Hung-Chih TSAI, Liang-Yu SU, Hang FAN
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Publication number: 20220011472Abstract: Provided is a Fresnel lens and display device with such Fresnel lens, the Fresnel lens includes an entrance plane and an exit plane with multiple bump units. The bump units include a First Bump Unit, a Second Bump Unit, and a Third Bump Unit; on one side of the central axis of said lens, the First Bump Unit, Second Bump Unit and Third Bump Unit are placed successively along the radiation direction from the central axis toward the lens edge; on the other side of the central axis of said lens, the First Bump Unit, Second Bump Unit and Third Bump Unit are also placed successively along the radiation direction from the central axis toward the lens edge. The Bump Units on both sides of the central axis of the lens are symmetrical.Type: ApplicationFiled: September 27, 2021Publication date: January 13, 2022Inventors: Kunyang Li, Di Pan, Yuqiao XIAN, Hang FAN, Weitang LIANG
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Publication number: 20210249404Abstract: The present disclosure provides a electrostatic discharge (ESD) protection circuit, coupled between a first reference terminal and a second reference terminal; the ESD protection circuit includes a first voltage divider, a second voltage divider, a first trigger circuit and a second trigger circuit. The first trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the first reference terminal, and the second terminal is coupled to the second reference terminal via the first voltage divider. The second trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the second reference terminal, the second terminal is coupled to the first reference terminal via the second voltage divider, and the second trigger circuit and the first trigger circuit are in parallel connection.Type: ApplicationFiled: March 31, 2021Publication date: August 12, 2021Inventors: MING-FANG LAI, LIANG-YU SU, HANG FAN
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Patent number: 10978445Abstract: The present disclosure provides a electrostatic discharge (ESD) protection circuit, coupled between a first reference terminal and a second reference terminal; the ESD protection circuit includes a first voltage divider, a second voltage divider, a first trigger circuit and a second trigger circuit. The first trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the first reference terminal, and the second terminal is coupled to the second reference terminal via the first voltage divider. The second trigger circuit includes a first terminal and a second terminal, wherein the first terminal is coupled to the second reference terminal, the second terminal is coupled to the first reference terminal via the second voltage divider, and the second trigger circuit and the first trigger circuit are in parallel connection.Type: GrantFiled: April 27, 2018Date of Patent: April 13, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ming-Fang Lai, Liang-Yu Su, Hang Fan