Abstract: An ion beam lens and methods for combining ion beams are disclosed. Embodiments combine hyperthermal ion beams and can include layered three-dimensional electrodes with passageways through the electrodes, each electrode having a specified DC voltage and each passageway configured for passing an ion beam to an exit, the velocity vectors of the beams being primarily oriented along the lens' central axis upon exiting the passageways. Embodiments include nested electrode plates with curved ion beam passageways. In some embodiments each electrode plate has a charge different from the electrode plates adjacent to it, and in some embodiments every other electrode plate is charged with a first DC voltage and the remaining plates are charged with a second DC voltage different from the first DC voltage.

Abstract: The present discloses a thermal energy recovery auxiliary system for temperature detection of molten steel in a steelmaking process, comprising an electric arc furnace, a water supply device, a power generation system, a piston type oxygen compression device, and one or more non-contact temperature measurement devices. A flue communicates with a side wall of the electric arc furnace. The water supply device includes a water supply tank, a water supply pipeline of an electrolytic cell, and a thermal energy recovery component. The power generation system includes a Seebeck-effect thermoelectric power generation component and an electrolytic cell. The piston type oxygen compression device forms a steam containment chamber and an oxygen containment chamber through a piston isolation.

Abstract: An ion beam lens and methods for combining ion beams are disclosed. Embodiments combine hyperthermal ion beams and can include layered three-dimensional electrodes with passageways through the electrodes, each electrode having a specified DC voltage and each passageway configured for passing an ion beam to an exit, the velocity vectors of the beams being primarily oriented along the lens' central axis upon exiting the passageways. Embodiments include nested electrode plates with curved ion beam passageways. In some embodiments each electrode plate has a charge different from the electrode plates adjacent to it, and in some embodiments every other electrode plate is charged with a first DC voltage and the remaining plates are charged with a second DC voltage different from the first DC voltage.

Abstract: A method of determining the next location for obtaining Mass Spectrometry Imaging (MSI) data is disclosed which includes receiving a priori MSI data for a plurality of m/z channels from all of a sample based on a predefined spatial resolution, choosing a first selection of m/z channels, iteratively receiving Estimated Reduction in Distortion (ERD) maps from a model for each of the first selection of m/z channels, indicating the next location where the MSI data is to be collected, identifying a plurality of operational sparse spatial locations on the sample, obtaining from the a priori MSI data, data associated with the first selection of m/z channels, reconstructing an operational MSI image from the spatially sparse data for selected m/z channels representing an operational reconstructed image from all of the sample, the model configured to output ERD maps for each of the first selection of m/z channels.

Abstract: A preparation method of a pyrimidinylthio-benzoate oxime ester compound and an application thereof are provided. The chemical structural formula of the pyrimidinylthio-benzoate compound is shown in the following formula (1). The preparation method includes step A: preparation of a substituted acetophenone oxime: taking hydroxylamine hydrochloride and a substituted acetophenone as a raw material, adding an alcohol as a solvent, and performing a reaction at 0° C.-80° C. for 1-5 hours under an alkaline condition to obtain the substituted acetophenone oxime; and step B: preparation of the compound: using 2-chloro-6-((4,6-dimethoxypyrimidin-2-yl)thio)benzoic acid and the substituted acetophenone oxime as a raw material, and performing a reaction under an action of an organic solvent, a dehydrating agent and a catalyst at 25° C. for 6-24 hours; after the reaction is completed, performing a suction filtration, and subjecting the filtrate to a decompression distillation and a recrystallization to obtain the compound.

Abstract: An ion beam lens and methods for combining ion beams are disclosed. Embodiments combine hyperthermal ion beams and can include layered three-dimensional electrodes with passageways through the electrodes, each electrode having a specified DC voltage and each passageway configured for passing an ion beam to an exit, the velocity vectors of the beams being primarily oriented along the lens' central axis upon exiting the passageways. Embodiments include nested electrode plates with curved ion beam passageways. In some embodiments each electrode plate has a charge different from the electrode plates adjacent to it, and in some embodiments every other electrode plate is charged with a first DC voltage and the remaining plates are charged with a second DC voltage different from the first DC voltage.

Abstract: A preparation method of a pyrimidinylthio-benzoate oxime ester compound and an application thereof are provided. The chemical structural formula of the pyrimidinylthio-benzoate compound is shown in the following formula (I). The preparation method includes step A: preparation of a substituted acetophenone oxime: taking hydroxylamine hydrochloride and a substituted acetophenone as a raw material, adding an alcohol as a solvent, and performing a reaction at 0° C.-80° C. for 1-5 hours under an alkaline condition to obtain the substituted acetophenone oxime; and step B: preparation of the compound: using 2-chloro-6-((4,6-dimethoxypyrimidin-2-yl)thio)benzoic acid and the substituted acetophenone oxime as a raw material, and performing a reaction under an action of an organic solvent, a dehydrating agent and a catalyst at 25° C. for 6-24 hours; after the reaction is completed, performing a suction filtration, and subjecting the filtrate to a decompression distillation and a recrystallization to obtain the compound.

Abstract: A vertical transistor device comprises a substrate, a first source, a drain, a first gate dielectric layer, a first gate electrode and a first doping region. The substrate has at least one protruding portion. The first source having a first conductivity type is formed on the substrate. The drain having the first conductivity type is disposed on the protruding portion. The first gate electrode is disposed adjacent to a first sidewall of the protruding portion. The first gate dielectric layer is disposed between the first gate electrode and the first sidewall as well as being disposed adjacent to the first source and the drain. The first doping region having a second conductivity type is formed beneath the protruding portion and adjacent to the first source.

Abstract: The present invention provides a method of forming a doping region. A substrate is provided, and a poly-silicon layer is formed on the substrate. A silicon oxide layer is formed on the poly-silicon layer. An implant process is performed to form a doping region in the poly-silicon layer. The present invention further provides a method for forming a MOS.

Abstract: A vertical transistor device comprises a substrate, a first source, a drain, a first gate dielectric layer, a first gate electrode and a first doping region. The substrate has at least one protruding portion. The first source having a first conductivity type is formed on the substrate. The drain having the first conductivity type is disposed on the protruding portion. The first gate electrode is disposed adjacent to a first sidewall of the protruding portion. The first gate dielectric layer is disposed between the first gate electrode and the first sidewall as well as being disposed adjacent to the first source and the drain. The first doping region having a second conductivity type is formed beneath the protruding portion and adjacent to the first source.

Abstract: The present invention provides a method of forming a doping region. A substrate is provided, and a poly-silicon layer is formed on the substrate. A silicon oxide layer is formed on the poly-silicon layer. An implant process is performed to form a doping region in the poly-silicon layer. The present invention further provides a method for forming a MOS.

Abstract: A facile mechanochemical intercalation approach was adopted to immobilize ionic liquids into layered materials. The immobilized ionic liquids were found to be useful as catalysts for the coupling reaction of CO2 and propylene oxide to synthesize propylene carbonate. The immobilized ionic liquid exhibited similar reactivity as the free ionic liquid. Overall, the 10 mechanochemical approach proves to be effective in immobilizing ionic liquids in layered compounds and thus may expand the applications of ionic liquids and, meanwhile, improve catalyst separation and recycling.

Abstract: A manufacturing method of a semiconductor device includes the following steps. First, a substrate is provided. At least one gate trench and a first inter-layer dielectric layer are formed on the substrate. A work function metallic layer is then formed in the gate trench. A first contact hole is then formed in the first inter-layer dielectric layer. A main conductive layer is formed in the gate trench and the first contact hole simultaneously.

Abstract: A method for forming an embedded capacitor structure is provided. Firstly, a first dielectric layer having a trench therein on a substrate is provided. A capacitor structure is formed on the bottom surface of the trench. The capacitor structure includes a first metal layer, a capacitance-insulating layer and a second metal layer and the portion surface of the first metal layer on the bottom surface of the trench is exposed. A cap layer is formed on the top surface and the inner surface of the trench and on the capacitor structure. A second dielectric layer is formed on the cap layer. The portion of second dielectric layer and the portion of the cap layer are removed to form a plurality of contact windows therein, and the portion surface of the first metal layer and the portion surface of the second metal layer are exposed by the plurality of contact windows.

Abstract: A manufacturing method of a semiconductor device includes the following steps. First, a substrate is provided. At least one gate trench and a first inter-layer dielectric layer are formed on the substrate. A work function metallic layer is then formed in the gate trench. A first contact hole is then formed in the first inter-layer dielectric layer. A main conductive layer is formed in the gate trench and the first contact hole simultaneously.

Abstract: A method for forming an embedded capacitor structure is provided. Firstly, a first dielectric layer having a trench therein on a substrate is provided. A capacitor structure is formed on the bottom surface of the trench. The capacitor structure includes a first metal layer, a capacitance-insulating layer and a second metal layer and the portion surface of the first metal layer on the bottom surface of the trench is exposed. A cap layer is formed on the top surface and the inner surface of the trench and on the capacitor structure. A second dielectric layer is formed on the cap layer. The portion of second dielectric layer and the portion of the cap layer are removed to form a plurality of contact windows therein, and the portion surface of the first metal layer and the portion surface of the second metal layer are exposed by the plurality of contact windows.

Abstract: A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a gate and a source/drain region thereon; forming a Ni—Pt layer on surface of the gate and the source/drain region; performing a first rapid thermal process to react a portion of the Ni—Pt layer into a silicide layer; removing un-reacted nickel from the first rapid thermal process; removing un-reacted platinum from the first rapid thermal process; performing a second rapid thermal process for lowering the resistance of the silicide layer; and covering a contact etch stop layer (CESL) on the silicide layer after the second rapid thermal process.