Abstract: Techniques regarding encapsulating one or more superconducting devices of a quantum processor are provided. For example, one or more embodiments described herein can regard a method that can comprise depositing a metal fluoride layer onto a superconducting resonator and a silicon substrate that can be comprised within a quantum processor. The superconducting resonator can be positioned on the silicon substrate. Also, the metal fluoride layer can coat the superconducting resonator.

Abstract: Techniques regarding encapsulating one or more superconducting devices of a quantum processor are provided. For example, one or more embodiments described herein can regard a method that can comprise depositing an adhesion layer onto a superconducting resonator and a silicon substrate that are comprised within a quantum processor. The superconducting resonator can be positioned on the silicon substrate. Also, the adhesion layer can comprise a chemical compound having a thiol functional group.

Abstract: According to an embodiment of the present invention, a system for non-invasively characterizing a qubit device includes a characterization probe chip. The characterization probe chip includes a substrate and a characterization resonator formed on a first surface of the substrate. The characterization resonator includes a superconducting stripline, and a superconducting antenna coupled to an end of the superconducting stripline, the superconducting antenna positioned to align with a qubit on the qubit device being characterized. The characterization probe chip also includes and a superconducting ground plane formed on a second surface of the substrate, the second surface opposing the first surface. In operation, the superconducting antenna is configured to capacitively couple the characterization resonator to the qubit aligned with the superconducting antenna for characterization of the qubit.

Abstract: According to an embodiment of the present invention, a system for non-invasively characterizing a qubit device includes a characterization probe chip. The characterization probe chip includes a substrate and a characterization resonator formed on a first surface of the substrate. The characterization resonator includes a superconducting stripline, and a superconducting antenna coupled to an end of the superconducting stripline, the superconducting antenna positioned to align with a qubit on the qubit device being characterized. The characterization probe chip also includes and a superconducting ground plane formed on a second surface of the substrate, the second surface opposing the first surface. In operation, the superconducting antenna is configured to capacitively couple the characterization resonator to the qubit aligned with the superconducting antenna for characterization of the qubit.

Abstract: Symmetrical qubits with reduced far-field radiation are provided. In one example, a qubit device includes a first group of superconducting capacitor pads positioned about a defined location of the qubit device, wherein the first group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a first polarity, and a second group of superconducting capacitor pads positioned about the defined location of the qubit device in an alternating arrangement with the first group of superconducting capacitor pads, wherein the second group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a second polarity that is opposite the first polarity.

Abstract: Systems, devices, computer-implemented methods, and computer program products to facilitate contactless screening of a qubit are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a scanner component that establishes a direct microwave coupling of a scanning probe device to a qubit of a quantum device. The computer executable components can further comprise a parameter extraction component that determines qubit frequency of the qubit based on the direct microwave coupling.

Abstract: A modular superconducting quantum processor includes a first superconducting chip including a first plurality of qubits each having substantially a first resonance frequency and a second plurality of qubits each having substantially a second resonance frequency, the first resonance frequency being different from the second resonance frequency, and a second superconducting chip including a third plurality of qubits each having substantially the first resonance frequency and a fourth plurality of qubits each having substantially the second resonance frequency. The quantum processor further includes an interposer chip connected to the first superconducting chip and to the second superconducting chip. The interposer chip has interposer coupler elements configured to couple the second plurality of qubits to the fourth plurality of qubits.

Abstract: A qubit includes a substrate, and a first capacitor structure having a lower portion formed on a surface of the substrate and at least one first raised portion extending above the surface of the substrate. The qubit further includes a second capacitor structure having a lower portion formed on the surface of the substrate and at least one second raised portion extending above the surface of the substrate. The first capacitor structure and the second capacitor structure are formed of a superconducting material. The qubit further includes a junction between the first capacitor structure and the second capacitor structure. The junction is disposed at a predetermined distance from the surface of the substrate and has a first end in contact with the first raised portion and a second end in contact with the second raised portion.

Abstract: In an embodiment, a quantum device includes an interposer layer comprising a set of vias. In an embodiment, the quantum device includes a dielectric layer formed on a first side of the interposer, the dielectric layer including a set of transmission lines communicatively coupled to the set of vias. In an embodiment, the quantum device includes a plurality of qubit chips coupled to an opposite side of the interposer layer, each qubit chip of the plurality of qubit chips including: a plurality of qubits on a first side of the qubit chip and a plurality of protrusions on a second side of the qubit chip. In an embodiment, the quantum device includes a heat sink thermally coupled with the plurality of qubit chips, the heat sink comprising a plurality of recesses aligned with the plurality of protrusions of the plurality of qubit chips.

Abstract: Symmetrical qubits with reduced far-field radiation are provided. In one example, a qubit device includes a first group of superconducting capacitor pads positioned about a defined location of the qubit device, wherein the first group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a first polarity, and a second group of superconducting capacitor pads positioned about the defined location of the qubit device in an alternating arrangement with the first group of superconducting capacitor pads, wherein the second group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a second polarity that is opposite the first polarity.

Abstract: In an embodiment, a quantum device includes an interposer layer comprising a set of vias. In an embodiment, the quantum device includes a dielectric layer formed on a first side of the interposer, the dielectric layer including a set of transmission lines communicatively coupled to the set of vias. In an embodiment, the quantum device includes a plurality of qubit chips coupled to an opposite side of the interposer layer, each qubit chip of the plurality of qubit chips including: a plurality of qubits on a first side of the qubit chip and a plurality of protrusions on a second side of the qubit chip. In an embodiment, the quantum device includes a heat sink thermally coupled with the plurality of qubit chips, the heat sink comprising a plurality of recesses aligned with the plurality of protrusions of the plurality of qubit chips.

Abstract: Embodiments of the present invention disclose a computer system having a plurality of quantum circuits arranged in a two-dimensional plane-like structure, the quantum circuits comprising qubits and busses (i.e., qubit-qubit interconnects), and a method of formation therefor. A quantum computer system comprises a plurality of quantum circuits arranged in a two-dimensional pattern. At least one interior quantum circuit, not along the perimeter of the two-dimensional plane of the plurality of quantum circuits, contains a bottom chip, a device layer, a top chip, and a routing layer. A signal wire connects the device layer to the routing layer, wherein the signal wire breaks the two dimensional plane, for example, the signal wire extends into a different plane.

Abstract: In an embodiment, a quantum device includes an interposer layer comprising a set of vias. In an embodiment, the quantum device includes a dielectric layer formed on a first side of the interposer, the dielectric layer including a set of transmission lines communicatively coupled to the set of vias. In an embodiment, the quantum device includes a plurality of qubit chips coupled to an opposite side of the interposer layer, each qubit chip of the plurality of qubit chips including: a plurality of qubits on a first side of the qubit chip and a plurality of protrusions on a second side of the qubit chip. In an embodiment, the quantum device includes a heat sink thermally coupled with the plurality of qubit chips, the heat sink comprising a plurality of recesses aligned with the plurality of protrusions of the plurality of qubit chips.

Abstract: Techniques regarding parallel gradiometric SQUIDs and the manufacturing thereof are provided. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a first pattern of superconducting material located on a substrate. Also, the apparatus can comprise a second pattern of superconducting material that can extend across the first pattern of superconducting material at a position. Further, the apparatus can comprise a Josephson junction located at the position, which can comprise an insulating barrier that can connect the first pattern of superconductor material and the second pattern of superconductor material.

Abstract: A technique relates to communication of a quantum state. Polarization hardware is configured to receive a polarization encoded qubit and split the polarization encoded qubit into two qubits. A converter is coupled to the polarization hardware, and the converter is configured to convert the two qubits into a form suitable for a CNOT gate. The CNOT gate is configured to receive the two qubits such that a measurement result of a CNOT operation of the CNOT gate determines success of the communication of the quantum state.

Abstract: Techniques regarding parallel gradiometric SQUIDs and the manufacturing thereof are provided. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a first pattern of superconducting material located on a substrate. Also, the apparatus can comprise a second pattern of superconducting material that can extend across the first pattern of superconducting material at a position. Further, the apparatus can comprise a Josephson junction located at the position, which can comprise an insulating barrier that can connect the first pattern of superconductor material and the second pattern of superconductor material.

Abstract: Techniques regarding parallel gradiometric SQUIDs and the manufacturing thereof are provided. For example, one or more embodiments described herein can comprise an apparatus, which can comprise a first pattern of superconducting material located on a substrate. Also, the apparatus can comprise a second pattern of superconducting material that can extend across the first pattern of superconducting material at a position. Further, the apparatus can comprise a Josephson junction located at the position, which can comprise an insulating barrier that can connect the first pattern of superconductor material and the second pattern of superconductor material.

Abstract: Symmetrical qubits with reduced far-field radiation are provided. In one example, a qubit device includes a first group of superconducting capacitor pads positioned about a defined location of the qubit device, wherein the first group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a first polarity, and a second group of superconducting capacitor pads positioned about the defined location of the qubit device in an alternating arrangement with the first group of superconducting capacitor pads, wherein the second group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a second polarity that is opposite the first polarity.

Abstract: Symmetrical qubits with reduced far-field radiation are provided. In one example, a qubit device includes a first group of superconducting capacitor pads positioned about a defined location of the qubit device, wherein the first group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a first polarity, and a second group of superconducting capacitor pads positioned about the defined location of the qubit device in an alternating arrangement with the first group of superconducting capacitor pads, wherein the second group of superconducting capacitor pads comprise two or more superconducting capacitor pads having a second polarity that is opposite the first polarity.

Abstract: A technique relates to communication of a quantum state. Polarization hardware is configured to receive a polarization encoded qubit and split the polarization encoded qubit into two qubits. A converter is coupled to the polarization hardware, and the converter is configured to convert the two qubits into a form suitable for a CNOT gate. The CNOT gate is configured to receive the two qubits such that a measurement result of a CNOT operation of the CNOT gate determines success of the communication of the quantum state.