Patents by Inventor Hanmook Park

Hanmook Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8756464
    Abstract: Disclosed are a flash memory device and flash memory programming method that equalizes a wear-level. The flash memory device includes a memory cell array, an inversion determining unit to generate a programming page through inverting or not inverting a data page based on a number of ‘1’s and ‘0’s in the data page, a programming unit to store the generated programming page in the memory cell array; and a data verifying unit to read the programming page stored in the memory cell array, to restore the data page from the programming page according to whether an error exists in the read programming page, and to output the restored data page, and thereby can equalize a wear-level of a memory cell.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: June 17, 2014
    Assignee: OCZ Storage Solutions Inc.
    Inventors: Bumsoo Kim, Hyunmo Chung, Hanmook Park
  • Patent number: 8554986
    Abstract: Disclosed is a flash memory controlling method and controlling device. The flash memory controlling method including calculating a cost for each of available block recycling schemes based on a multi-block erase function when the multi-block erase function is supported, the multi-block erase function being a function that simultaneously erases data stored in a plurality of blocks of a flash memory and selecting at least one scheme from among the available block recycling schemes based on the calculated cost, and managing at least one block using the at least one method selected from among the available block recycling schemes.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: October 8, 2013
    Assignee: OCZ Technology Group Inc.
    Inventors: Jongmin Lee, Donghee Lee, Hanmook Park
  • Publication number: 20110145490
    Abstract: Disclosed is a flash memory controlling method and controlling device. The flash memory controlling method including calculating a cost for each of available block recycling schemes based on a multi-block erase function when the multi-block erase function is supported, the multi-block erase function being a function that simultaneously erases data stored in a plurality of blocks of a flash memory and selecting at least one scheme from among the available block recycling schemes based on the calculated cost, and managing at least one block using the at least one method selected from among the available block recycling schemes.
    Type: Application
    Filed: September 4, 2008
    Publication date: June 16, 2011
    Inventors: Jongmin Lee, Donghee Lee, Hanmook Park
  • Publication number: 20100287427
    Abstract: Disclosed are a flash memory device and flash memory programming method that equalizes a wear-level. The flash memory device includes a memory cell array, an inversion determining unit to generate a programming page through inverting or not inverting a data page based on a number of ‘1’s and ‘0’s in the data page, a programming unit to store the generated programming page in the memory cell array; and a data verifying unit to read the programming page stored in the memory cell array, to restore the data page from the programming page according to whether an error exists in the read programming page, and to output the restored data page, and thereby can equalize a wear-level of a memory cell.
    Type: Application
    Filed: August 25, 2008
    Publication date: November 11, 2010
    Inventors: Bumsoo Kim, Hyunmo Chung, Hanmook Park
  • Publication number: 20100287335
    Abstract: Disclosed is a flash memory device for adjusting a read signal timing and read control method of the flash memory device. The flash memory device includes a plurality of flash memory units, a common input/output bus connected with each of the plurality of flash memory units, and a controller to propagate the read control signal to a flash memory unit selected from among the plurality of flash memories and to receive data read from the selected flash memory unit via the common input/output bus, the controller being connected with the common input/output bus, wherein the controller adjusts a propagation timing of the read control signal unit based on a propagation delay corresponding to the selected flash memory unit, and thereby controlling a timing optimized for each flash memory unit.
    Type: Application
    Filed: August 25, 2008
    Publication date: November 11, 2010
    Inventors: Hyunmo Chung, Hanmook Park