Abstract: A method of passively braking a motor to reduce a current motor speed includes generating at least one control signal to control a first load current generated by a first half bridge circuit and a second load current generated by a second half bridge circuit. During passive braking, the method includes synchronously driving a first high-side transistor and a second high-side transistor between their respective switching states at an alternating shorting frequency such that they are simultaneously in a same switching state, and synchronously driving a first low-side transistor and a second low-side transistor between their respective switching states at the alternating shorting frequency such that they are simultaneously in a same switching state, wherein the first high-side transistor and the second high-side transistor are driven in a complementary manner to the first low-side transistor and the second low-side transistor according to a predetermined duty cycle.

Abstract: A semiconductor die includes: a semiconductor substrate; transistor cells formed in a first region of the semiconductor substrate and electrically coupled in parallel to form a power transistor, the transistor cells including first trenches that extend from a first surface of the semiconductor substrate into the first region; a gate pad formed above the first surface and electrically connected to gate electrodes in the first trenches, the gate pad being formed over a second region of the semiconductor substrate that is devoid of functional transistor cells; second trenches extending from the first surface into the second region and including gate electrodes that are electrically connected to the gate pad and form a first conductor of an additional input capacitance of the power transistor; and a second conductor of the additional input capacitance formed in the second region adjacent the second trenches. Methods of producing the semiconductor die are also described.