Patents by Inventor Hans HUANG

Hans HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250260841
    Abstract: A device for decoding video data comprises one or more processors configured to: obtain a syntax element from a bitstream that includes an encoded representation of the video data; determine, based on the syntax element, that a template-matching tool is enabled; based on the template-matching tool being enabled, applying the template-matching tool to generate a prediction block for a current coding unit (CU) of the video data; and reconstruct the current CU based on the prediction block for the current CU.
    Type: Application
    Filed: April 29, 2025
    Publication date: August 14, 2025
    Inventors: Chun-Chi Chen, Han Huang, Vadim Seregin, Marta Karczewicz
  • Publication number: 20250249655
    Abstract: A recyclable laminate includes a first layer that includes a first inner surface having a bonded region, and a second layer that includes a second inner surface. The second inner surface includes yarns which are distributed thereon and which form micropores. The bonded region extends into a portion of the micropores to wrap corresponding ones of the yarns, so that the first inner surface is partially fusion bonded to the second inner surface at the bonded region and and partially unbonded to the second inner surface at a region other than the bonded region. The first thin layer and the second thin layer are made of a recyclable material, and are structurally different from each other. A recyclable garment made from the recyclable laminate is also provided.
    Type: Application
    Filed: March 18, 2025
    Publication date: August 7, 2025
    Inventors: Chen-Cheng HUANG, Pao-Hao HUANG, Pao-Han HUANG
  • Publication number: 20250240438
    Abstract: An example device includes memory, and one or more processors configured to determine to decode a current block of the video data using motion information of a second block of the video data. The one or more processors are configured to determine a value of a LIC flag of the second block, the value of the LIC flag of the second block indicative of LIC being applied to the second block. The one or more processors are configured to determine, based on the value of the LIC flag, to apply LIC to the current block. The one or more processors are configured to infer LIC model parameters of the current block to be equal to LIC model parameters of the second block. The one or more processors are configured to decode the current block including using the inferred LIC model parameters and the motion information of the second block.
    Type: Application
    Filed: December 18, 2024
    Publication date: July 24, 2025
    Inventors: Chun-Chi Chen, Han Huang, Yan Zhang, Zhi Zhang, Vadim Seregin, Marta Karczewicz
  • Publication number: 20250238240
    Abstract: A data processing system includes a source device, a first processing device, and a first monitoring circuit. The source device generates a streaming output, where the streaming output includes consecutive data segments for each data path, and the consecutive data segments are output during consecutive periods, respectively. The first processing device is located on at least one data path, and receives and processes a first streaming input derived from the streaming output. When a monitor result generated from the first monitoring circuit indicates that driver settings of the source device are not ready before a start time of a first period or driver settings of the first processing device are not ready before the start time of the first period, the first processing device is configured to skip processing of streaming data associated with at least one period starting from the first period.
    Type: Application
    Filed: January 3, 2025
    Publication date: July 24, 2025
    Applicant: MEDIATEK INC.
    Inventors: Chia-Han Huang, Huei-Min Lin
  • Publication number: 20250239101
    Abstract: A computing device obtains an image of a user and detects a facial region of the user within the image. The computing device detects facial landmark points within the facial region and extracts facial features based on the detected facial landmark points. The computing device calculates traits of the user based on the extracted facial features and calculates one or more personality types of the user based on the traits of the user.
    Type: Application
    Filed: April 11, 2025
    Publication date: July 24, 2025
    Inventor: Yung-Han HUANG
  • Patent number: 12367128
    Abstract: Disclosed is a method for automatically generating interactive test cases. The method comprises: after a UI of an application program is displayed, traversing all views in a view tree corresponding to the UI of the application program, and recording a path, in the view tree, of each view therein that can be clicked on, so as to obtain a set of path information, in the view tree, of all the views that can be clicked on in the UI; and respectively generating a corresponding test case for each piece of path information in the set: in the test case, according to path information, in the view tree, of a view under test, finding the view in the UI interface of the application program, and triggering a click event therefore, that is, completing a click interaction test on the view.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: July 22, 2025
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Han Huang, Jie Cao, Lei Ye, Fangqing Liu, Zhifeng Hao
  • Patent number: 12367909
    Abstract: A data processing device includes a base plate and an electronic module. The base plate includes N driving portions. The electronic module includes an electronic component, a tray and a recognition mechanism. The tray is configured to support the electronic component and includes N slots. The tray is disposed on the base plate, such that an i-th driving portion of the N driving portions is disposed in an i-th slot of the N slots. The recognition mechanism is disposed on the tray. The recognition mechanism includes N interfering portions and N receiving recesses. When the tray moves with respect to the base plate toward a first direction, the i-th driving portion moves within the i-th slot toward a second direction to push an i-th interfering portion of the N interfering portions to move, such that the i-th interfering portion extends into an i-th receiving recess of the N receiving recesses.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: July 22, 2025
    Assignee: Wiwynn Corporation
    Inventors: Fu-Sheng Cheng, Kuan-Chih Wang, Po-Han Huang, Hung-Chien Wu
  • Publication number: 20250234577
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The method includes forming a metal gate stack wrapped around multiple semiconductor nanostructures. The metal gate stack has a gate dielectric layer and a gate electrode, and the semiconductor nanostructures are adjacent to an epitaxial structure. The method also includes recessing the gate dielectric layer, and a protruding portion of the gate electrode protrudes from a top surface of the gate dielectric layer after the gate dielectric layer is recessed. The method further includes forming a protective structure over the epitaxial structure, and the protective structure laterally surrounds the protruding portion of the gate electrode. In addition, the method includes forming a conductive contact electrically connected to the epitaxial structure and penetrating through the protective structure.
    Type: Application
    Filed: January 12, 2024
    Publication date: July 17, 2025
    Inventors: I-Han HUANG, Chu-Yuan HSU, Jia-Chuan YOU, Chia-Hao CHANG, Kuo-Cheng CHIANG
  • Patent number: 12363306
    Abstract: An example device for decoding video data includes one or more processors configured to determine merge mode information for a current block, the merge mode information indicating that motion information for a current block is to be predicted using a first predictor motion vector and a second predictor motion vector; determine a first motion vector difference (MVD) for the first predictor motion vector and a second MVD for the second predictor motion vector, the second MVD being different than the first MVD; form a first motion vector equaling a combination of the first motion vector predictor and the first MVD; form a second motion vector equaling a combination of the second motion vector predictor and the second MVD; generate a prediction block using the first motion vector and the second motion vector; and decode the current block using the prediction block.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: July 15, 2025
    Assignee: QUALCOMM INCORPORATED
    Inventors: Chun-Chi Chen, Han Huang, Vadim Seregin, Marta Karczewicz
  • Publication number: 20250227979
    Abstract: A semiconductor transistor structure includes a semiconductor substrate having an active area and a trench isolation region surrounding the active area; a first inter-layer dielectric (ILD) layer covering the semiconductor substrate; a metal gate embedded in the first ILD layer and overlying the active area and the trench isolation region, wherein the metal gate comprises a first portion disposed directly above the active area and a second portion disposed directly above the trench isolation region, wherein the first portion is thicker than the second portion; a hard mask layer disposed on the second portion; and a gate dielectric layer disposed between the first portion of the metal gate and the active area.
    Type: Application
    Filed: January 23, 2024
    Publication date: July 10, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuan-Liang Liu, Szu-Han Huang
  • Patent number: 12355976
    Abstract: A video decoder can be configured to determine that a current block of the video data is coded in a bi-prediction inter mode; receive a first syntax element identifying a motion vector predictor from a first candidate list of motion vector predictors; receive a second syntax element identifying a motion vector difference; determine a first motion vector for the current block based on the motion vector predictor and the motion vector difference; determine a second motion vector for the current block from a second list of candidate motion vector predictors based on bilateral matching; and determine a prediction block for the current block using the first motion vector and the second motion vector.
    Type: Grant
    Filed: June 12, 2024
    Date of Patent: July 8, 2025
    Assignee: QUALCOMM INCORPORATED
    Inventors: Zhi Zhang, Chun-Chi Chen, Han Huang, Vadim Seregin, Marta Karczewicz
  • Publication number: 20250213628
    Abstract: Provided are Bifidobacterium breve and a probiotic composition comprising the strain. Bifidobacterium breve was deposited in the Bioresource Collection and Research Center of Food Industry Research and Development Institute Taiwan, China on Aug. 8, 2022, and the deposit number BCRC 911145 was obtained. Further provided is use of the strain or a culture thereof in the preparation of a composition for inhibiting maturation of adipocytes, a composition for reducing fat accumulation and/or promoting fat metabolism, a composition for reducing weight, a composition for regulating blood esters, or a composition for regulating blood glucose.
    Type: Application
    Filed: January 19, 2024
    Publication date: July 3, 2025
    Applicant: TCI CO., LTD.
    Inventors: Yung-Hsiang LIN, Chu-Han HUANG, Wei-Yao CHEN
  • Patent number: 12348762
    Abstract: A method of decoding video data comprising parsing a sub-prediction unit motion flag from received encoded video data, deriving a list of sub-prediction unit level motion prediction candidates if the sub-prediction unit motion flag is active, deriving a list of prediction unit level motion prediction candidates if the sub-prediction unit motion flag is not active, and decoding the encoded video data using a selected motion vector predictor.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: July 1, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Han Huang, Wei-Jung Chien, Vadim Seregin, Marta Karczewicz
  • Publication number: 20250203812
    Abstract: A leakage gathering assembly includes a leakage gathering tray. The leakage gathering tray has a surface, a plurality of conveying channels, a convergent channel and a plurality of identification recesses. The conveying channels, the convergent channel and the identification recesses are recessed from the surface, the conveying channels communicate with the convergent channel, the identification recesses respectively communicate with the conveying channels, and depths of the identification recesses are greater than depths of the conveying channels.
    Type: Application
    Filed: July 23, 2024
    Publication date: June 19, 2025
    Inventors: Hung Chien Wu, PO HAN HUANG, Zi-Ping Wu, Tai-Ying Tu
  • Patent number: 12317088
    Abstract: A method for selecting a radio resource management scheme is disclosed. A distance between two wireless access points of two wireless local area networks is received. A calculated signal strength corresponding to the distance is determined. One or more signal strengths associated with communication between the two wireless access points are received. A difference between a first value associated with the received one or more signal strengths and a second value associated with the calculated signal strength is determined. The difference is compared to a threshold difference value to determine an environment assessment result. Based on the environment assessment result, an option among a plurality of radio resource management scheme options is selected for at least the two wireless access points.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: May 27, 2025
    Assignee: Meta Platforms, Inc.
    Inventors: Pratheep Bondalapati, Po Han Huang, Haleema Mehmood, Krishna Srikanth Gomadam
  • Patent number: 12315843
    Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, the 3D IC comprises a first IC die comprising a first substrate, a first interconnect structure disposed over the first substrate, and a first through substrate via (TSV) disposed through the first substrate. The 3D IC further comprises a second IC die comprising a second substrate, a second interconnect structure disposed over the second substrate, and a second TSV disposed through the second substrate. The 3D IC further comprises a bonding structure arranged between back sides of the first IC die and the second IC die opposite to corresponding interconnect structures and bonding the first IC die and the second IC die. The bonding structure comprises conductive features disposed between and electrically connecting the first TSV and the second TSV.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: May 27, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao, Yung-Lung Lin, Shih-Han Huang, I-Nan Chen
  • Publication number: 20250166681
    Abstract: An integrated circuit includes a memory cell array, a row decoder configured to generate a first decoder signal, a column decoder configured to generate a second decoder signal and an array of write assist circuits electrically coupled to the row and column decoder and the memory cell array. Each write assist circuit is configured to set an operating voltage of a corresponding memory cell. The operating voltage corresponds to an output signal. Each write assist circuit includes a set of P-type transistors coupled together in parallel and further coupled to a supply voltage, and configured to set the output signal in response to an input control signal, and a first N-type transistor coupled to the set of P-type transistors. A first terminal of the first N-type transistor is configured to receive the input control signal. A second terminal of the first N-type transistor is coupled to the supply voltage.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Inventors: Chih-Chieh CHIU, Chia-En HUANG, Fu-An WU, I-Han HUANG, Jung-Ping YANG
  • Publication number: 20250166357
    Abstract: A segmentation model training method is disclosed. The segmentation model includes the following operations: inputting several first sample groups of a large sample set to a data augmentation model to generate several augmentation sample groups; generating several mix sample groups based on several second sample groups of a small sample set; inputting several mix sample groups to the data augmentation model to generate several augmentation mix sample groups; and training a segmentation model according to several augmentation sample groups and several augmentation mix sample groups, including: performing pre-training to the segmentation model according to several augmentation sample groups; and performing fine-tuning training to the segmentation model corresponding to several augmentation mix sample groups.
    Type: Application
    Filed: January 21, 2024
    Publication date: May 22, 2025
    Inventors: Shang-Jui KUO, Po-Han HUANG, Chia-Ching LIN, Jeng-Lin LI, Ming-Ching CHANG, Wei-Chao CHEN
  • Publication number: 20250126241
    Abstract: A video coder configured to receive a block of video data to be coded using merge mode and local illumination compensation (LIC), and determine a merge candidate for the block of video data. If the merge candidate is a non-adjacent candidate or a history-based motion vector predictor candidate, the video coder is configured to inherit LIC parameters associated with the merge candidate. If the merge candidate is an adjacent candidate, the video coder is configured to derive LIC parameters for the block of video data using a neighboring template of reconstructed samples and a reference template in a reference frame.
    Type: Application
    Filed: September 13, 2024
    Publication date: April 17, 2025
    Inventors: Han Huang, Vadim Seregin, Marta Karczewicz
  • Patent number: D1076924
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: May 27, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Yinggang Du, Jo Han Huang, Keith Kuehn, Kevin Liu