Abstract: A capacitor structure includes a first capacitor device structure, a first circuit layer, and at least one second capacitor device structure. The first capacitor device structure includes a first substrate and first capacitors. The first capacitors are located in the first substrate. The first circuit layer is located on the first capacitor device structure. The at least one second capacitor device structure is located on the first circuit layer. The second capacitor device structure includes a second substrate and second capacitors. The second capacitors are located in the second substrate. The first capacitors and the second capacitors are connected in parallel by the first circuit layer.

Abstract: Embodiments of the present disclosure include a scanning electron microscope (SEM) having an electron gun configured to generate an electron beam that is directed along an axis through a column of the SEM towards a sample stage. In some embodiments, the SEM includes a first backscattered electron (BSE) detector mounted along the axis. In some examples, the SEM further includes a second BSE detector mounted off the axis, where the second BSE detector wraps around a bottom portion of the column. The second BSE detector, in some examples, includes a plurality of blades having either a flat shape or an arc shape in a side view. Additionally, in some embodiments, the plurality of blades are arranged in a circular configuration in a top view.

Abstract: A semiconductor device and method of manufacturing that includes a first etch stop layer and a second etch stop layer to prevent delamination and damage to underlying components. A first passivation layer and a second passivation layer are disposed on a substrate, with a metal pad exposed through the passivation layers and contacting a top metal component of the substrate. The first etch stop layer is then formed on the second passivation layer and the metal pad. A third passivation layer is then formed on the substrate with an opening to the metal pad, which is covered by the first etch stop layer. The second etch stop layer is then formed on the third passivation layer and in the opening on the second etch stop layer. A bottom metal film/conductive component is then formed on the second etch stop layer, photoresist is applied, and wet etching is performed. The metal pad is protected from damage caused by delamination of the second etch stop layer by the first etch stop layer.

Abstract: A manufacturing method of a semiconductor structure including the following steps is provided. A substrate is provided. The substrate includes a front side and a back side opposite to each other. A device layer is formed on the front side of the substrate. A through-substrate via (TSV) is formed in the device layer and the substrate. The TSV extends from the front side of the substrate into the substrate. A first dielectric layer is formed between the TSV and the substrate. A patterning process is performed on the back side of the substrate to form an air gap. The air gap surrounds the TSV.

Abstract: A method includes: positioning a mask in a processing chamber of a mask repair apparatus; determining whether a first abnormality is present by a first gas analysis device during forming a first vacuum in a column over the processing chamber; determining whether a second abnormality is present by a second gas analysis device during forming a second vacuum in the processing chamber; determining whether a third abnormality is present by a third gas analysis device during flowing a process gas into the processing chamber; determining whether a fourth abnormality is present by a fourth gas analysis device during directing an electron beam or ion beam at the mask with the process gas in the processing chamber; and in response to determining that one of the first, second, third or fourth abnormalities is present: halting the directing an electron beam or ion beam at the mask; and performing a repair associated with the first, second, third or fourth abnormality that is present.

Abstract: A waterproof and shockproof structure of a fan module includes a shell, a waterproof rubber sealing ring and a connector module. The shell includes an opening and a flange. The flange is disposed in the opening, the waterproof rubber sealing ring is also disposed in the opening, and the connector module is installed in the waterproof rubber sealing ring, and is movably installed in the opening of the shell. The waterproof rubber sealing ring includes a first abutting portion, a first surrounding portion and a second abutting portion. The first surrounding portion is connected to the first abutting portion, the second abutting portion is connected to the first surrounding portion, and the first abutting portion, the first surrounding portion and the second abutting portion cover three surfaces of the flange of the shell.

Abstract: A semiconductor device includes a device layer, a first passivation layer, an aluminum pad, a second passivation layer, an under-ball metallurgy (UBM) pad and a connector. The device layer is disposed over a substrate, wherein the device layer includes a top metal feature. The first passivation layer is disposed over the device layer. The aluminum pad penetrates through the first passivation layer and is electrically connected to the top metal feature. The second passivation layer is disposed over the aluminum pad. The UBM pad penetrates through the second passivation layer and is electrically connected to the aluminum pad. The connector is disposed over the UBM pad. In some embodiments, a first included angle between a sidewall and a bottom of the aluminum pad is greater than a second included angle between a sidewall and a bottom of the UBM pad.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure. The method includes: providing a base and forming, on the base, a bit line contact region provided with a first groove; forming a first bit line contact layer in the first groove, wherein the first bit line contact layer in the first groove defines a second groove; forming a diffusion layer in the second groove, wherein the diffusion layer in the second groove defines a third groove; forming, in the third groove, a second bit line contact layer provided with a gap; and processing the diffusion layer.

Abstract: A biochemical detection device is revealed. The biochemical detection device includes a cap and a base arranged at two ends of a test tube correspondingly and a driving member disposed on the base. A sample-mounting slot and a test-paper-mounting slot separated from each other are formed in the test tube. After sampling, a sample obtained is placed into the sample-mounting slot and mixed with an extraction solution therein. A thin-film on the sample-mounting slot is penetrated by the driving member to allow the extraction solution mixed with the sample flowing into a cavity of the test tube to react with a test strip in the test-paper-mounting slot. The test cost is reduced and the detection efficiency is improved due to simple structure and easy operation. Moreover, the sample and the extraction solution are sealed in the test tube to prevent environmental pollution caused by spread of viruses.

Abstract: A display device includes a substrate, a switching element, a first insulating layer, a first metal layer, and an energy-absorbing layer. The switching element is on the substrate and has a source/drain. The first insulating layer covers the switching element and has a first opening. The first metal layer is on the first insulating layer and extends through the first opening. The energy-absorbing layer is over the first metal layer. A first orthographic projection area of the first opening projected on the substrate is within a second orthographic projection area of the energy-absorbing layer projected on the substrate. A laser reflectivity of a material of the energy-absorbing layer is higher than a laser reflectivity of a material of the source/drain. A laser absorptivity of the material of the energy-absorbing layer is lower than a laser absorptivity of the material of the source/drain.

Abstract: A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.

Abstract: A method for manufacturing a semiconductor device includes: forming a transistor on a semiconductor substrate, in which the transistor includes a gate structure and a source/drain structure; forming a patterned dielectric layer on the semiconductor substrate, in which the patterned dielectric layer includes an opening extending from a top surface of the patterned dielectric layer to a top surface of the source/drain structure; forming a dielectric contact spacer to cover a sidewall of the opening; and forming a conductive contact in the opening such that the conductive contact is connected to the source/drain structure and is isolated from the gate structure by the dielectric contact spacer and the patterned dielectric layer.

Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a substrate, bit line structures and isolation walls located on side walls of the bit line structures, and capacitor contact holes. In the substrate, conductive contact regions are arranged. The conductive contact regions are exposed from the substrate. A plurality of discrete bit line structures are located on the substrate. Each of the isolation walls includes at least one isolation layer and a gap between the isolation layer and the bit line structure. Each of the capacitor contact holes is constituted by a region surrounded by the isolation walls between the adjacent bit line structures. The capacitor contact holes expose the conductive contact regions. A top width of the capacitor contact holes is larger than a bottom width thereof in a direction parallel to an arrangement direction of the bit line structures.

Abstract: A method for forming a semiconductor device. The method includes performing a first etching process to define one or more fins and corresponding device isolation structures on a substrate. The method further includes forming an enhancement layer on each of the fins, such that the enhancement layer encapsulates each fin. The method further performs a second etching process to remove one or more of the fins, and performs a third etching process to remove a portion of the enhancement layer. The method also includes depositing an STI material on the fins and the device isolation structures, followed by recessing the fins relative to the STI material.

Abstract: An impeller and a fan are provided. The impeller includes a hub, a plurality of first blades, a plurality of second blades and a connecting member. The plurality of first blades are disposed around the hub separately. Each first blade is connected with a periphery of the hub. The plurality of second blades are disposed around the hub separately. Each second blade is disposed away from the periphery of the hub and located between two adjacent first blades of the plurality of first blades. The connecting member is disposed around the hub and penetrated through the plurality of first blades and the plurality of second blades. The connecting member is not in contact with a first edge of any side of each first blade. The connecting member is not in contact with a second edge of any side of each second blade.

Abstract: The embodiments of the present disclosure belong to the field of semiconductor manufacturing technology and relates to a method for manufacturing a semiconductor structure and a semiconductor structure. The method for manufacturing the semiconductor structure includes: a bit line structure is formed on a substrate, a fill channel is formed between the insulating structures on two adjacent bit lines; a conductor is formed within the fill channel; at least one slit is formed on the conductor along a direction perpendicular to a longitudinal direction of each of the plurality of bit line to divide the conductor into a plurality of conductive blocks, each of the plurality of conductive blocks is connected to one of transistors on the substrate.

Abstract: A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.

Abstract: Provided are a semiconductor structure and a method for preparing the same. The method for preparing a semiconductor structure includes: a substrate is provided; a stacked structure is formed on the substrate; a first capacitor having a first bottom electrode, a first dielectric layer and a first top electrode is formed in the stacked structure, in which the first bottom electrode is of a columnar structure; and a second capacitor having a second bottom electrode, a second dielectric layer and a second top electrode is formed on the first capacitor, in which the second bottom electrode is of a concave structure. The second dielectric layer is formed between the second bottom electrode and the second top electrode, and the second dielectric layer is further formed between the second bottom electrodes of adjacent second capacitors.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure and a semiconductor structure, relating to the technical field of semiconductors. The method of manufacturing a semiconductor structure includes: providing a substrate; forming active pillars arranged in an array on the substrate, a projection shape of a longitudinal section of each of the active pillars includes a cross shape; forming a first oxide layer on the substrate, where a filling region is formed between adjacent active pillars in the same row; sequentially forming a word line and a dielectric layer in the filling region; exposing a top surface of each of the active pillars; forming a contact layer on the active pillars; and forming a capacitor structure on the contact layer.