Abstract: A calibrated lithographic model may be used to generate a lithographic model output based on an integrated circuit (IC) design layout. Next, at least a chemical parameter may be extracted from the lithographic model output. A calibrated defect rate model may then be used to predict a defect rate for the IC design layout based on the chemical parameter.

Abstract: A computational lithography process uses machine learning models. An aerial image produced by a lithographic mask is first calculated using a two-dimensional model of the lithographic mask. This first aerial image is applied to a first machine learning model, which infers a second aerial image. The first machine learning model was trained using a training set that includes aerial images calculated using a more accurate three-dimensional model of lithographic masks. The two-dimensional model is faster to compute than the three-dimensional model but it is less accurate. The first machine learning model mitigates this inaccuracy.

Abstract: Initial source shapes for source mask optimization are determined based on a layout of the lithographic mask. In one approach, a layout of a lithographic mask is received. Different sections of the lithographic mask, referred to as clips, are selected. These clips are applied to a machine learning model which infers source shapes from the clips. The inferred source shapes are used as the initial source shapes for source mask optimization.

Abstract: A calibrated lithographic model may be used to generate a lithographic model output based on an integrated circuit (IC) design layout. Next, at least a chemical parameter may be extracted from the lithographic model output. A calibrated defect rate model may then be used to predict a defect rate for the IC design layout based on the chemical parameter.