Patents by Inventor Hans Jacobson
Hans Jacobson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9471136Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect a circuit to a common voltage source. The circuit is powered off circuit when disconnected. A multiplexer selectably connects a charge pump or common voltage source to a gate terminal of the power header switch. The charge pump provides a higher voltage to the gate terminal than the common voltage source. A controller is configured to control a selection of the multiplexer to the charge pump and the common voltage source. The controller is configured to disconnect the charge pump from the gate terminal and connect the common voltage source to the gate terminal of the power header switch in response to conditions: a prediction of a demand core power-up request, an increase in a gate leakage current, and/or a reduction in temperature of the powered off circuit.Type: GrantFiled: February 4, 2014Date of Patent: October 18, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Patent number: 9423865Abstract: A mechanism is provided for an integrated circuit with power gating. A power switch is configured to connect and disconnect circuits to a common voltage source. A capacitor tank is configured to supply wakeup charge to a given circuit. A controllable element is connected to the given circuit and to the capacitor tank. The controllable element is configured to controllably connect and disconnect the capacitor tank to the given circuit in order to supply the wakeup charge to the given circuit. The controllable element is configured to, responsive to the power switch disconnecting the given circuit from the common voltage source and to the given circuit being turned on to wakeup, supply the wakeup charge to the given circuit being turned on by transferring the wakeup charge from the capacitor tank to the given circuit. This reduces the electrical charge transferred from the circuits connected to the common voltage source.Type: GrantFiled: September 13, 2013Date of Patent: August 23, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Patent number: 9389674Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect a circuit to a common voltage source. The circuit is powered off circuit when disconnected. A multiplexer selectably connects a charge pump or common voltage source to a gate terminal of the power header switch. The charge pump provides a higher voltage to the gate terminal than the common voltage source. A controller is configured to control a selection of the multiplexer to the charge pump and the common voltage source. The controller is configured to disconnect the charge pump from the gate terminal and connect the common voltage source to the gate terminal of the power header switch in response to conditions: a prediction of a demand core power-up request, an increase in a gate leakage current, and/or a reduction in temperature of the powered off circuit.Type: GrantFiled: September 13, 2013Date of Patent: July 12, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Patent number: 9298253Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any one of multiple circuits to a common voltage source, where a powered off circuit is disconnected from the common voltage source. A power-up sequencer includes an initial stages power-up component and a final stages power-up component. The final stages power-up component is configured to execute final stages of a power-up process for the powered off circuit, and the initial stages power-up component is configured to execute initial stages of the power-up process for the powered off circuit. The initial stages power-up component is activated in response to a predictive power-up request.Type: GrantFiled: September 13, 2013Date of Patent: March 29, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Patent number: 9292079Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any one of multiple circuits to a common voltage source, where a powered off circuit is disconnected from the common voltage source. A power-up sequencer includes an initial stages power-up component and a final stages power-up component. The final stages power-up component is configured to execute final stages of a power-up process for the powered off circuit, and the initial stages power-up component is configured to execute initial stages of the power-up process for the powered off circuit. The initial stages power-up component is activated in response to a predictive power-up request.Type: GrantFiled: February 4, 2014Date of Patent: March 22, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150162898Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any circuits to a common voltage source. A powered off circuit is disconnected from the common voltage source. A first capacitor and a second capacitor are configured to supply wakeup electrical charge to a given circuit of the circuits. The first capacitor and the second capacitor are connectable to the given circuit and the powered off circuit. A controller is configured to controllably connect the first capacitor and/or the second capacitor to the given circuit in order to supply the wakeup electrical charge to the given circuit, when the powered off circuit was previously connected to the first capacitor and/or the second capacitor.Type: ApplicationFiled: February 17, 2015Publication date: June 11, 2015Inventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150162899Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any circuits to a common voltage source. A powered off circuit is disconnected from the common voltage source. A first capacitor and a second capacitor are configured to supply wakeup electrical charge to a given circuit of the circuits. The first capacitor and the second capacitor are connectable to the given circuit and the powered off circuit. A controller is configured to controllably connect the first capacitor and/or the second capacitor to the given circuit in order to supply the wakeup electrical charge to the given circuit, when the powered off circuit was previously connected to the first capacitor and/or the second capacitor.Type: ApplicationFiled: February 17, 2015Publication date: June 11, 2015Inventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150162904Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any circuits to a common voltage source. A powered off circuit is disconnected from the common voltage source. A first capacitor and a second capacitor are configured to supply wakeup electrical charge to a given circuit of the circuits. The first capacitor and the second capacitor are connectable to the given circuit and the powered off circuit. A controller is configured to controllably connect the first capacitor and/or the second capacitor to the given circuit in order to supply the wakeup electrical charge to the given circuit, when the powered off circuit was previously connected to the first capacitor and/or the second capacitor.Type: ApplicationFiled: February 17, 2015Publication date: June 11, 2015Inventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150162903Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any circuits to a common voltage source. A powered off circuit is disconnected from the common voltage source. A first capacitor and a second capacitor are configured to supply wakeup electrical charge to a given circuit of the circuits. The first capacitor and the second capacitor are connectable to the given circuit and the powered off circuit. A controller is configured to controllably connect the first capacitor and/or the second capacitor to the given circuit in order to supply the wakeup electrical charge to the given circuit, when the powered off circuit was previously connected to the first capacitor and/or the second capacitor.Type: ApplicationFiled: February 17, 2015Publication date: June 11, 2015Inventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150076908Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any circuits to a common voltage source. A powered off circuit is disconnected from the common voltage source. A first capacitor and a second capacitor are configured to supply wakeup electrical charge to a given circuit of the circuits. The first capacitor and the second capacitor are connectable to the given circuit and the powered off circuit. A controller is configured to controllably connect the first capacitor and/or the second capacitor to the given circuit in order to supply the wakeup electrical charge to the given circuit, when the powered off circuit was previously connected to the first capacitor and/or the second capacitor.Type: ApplicationFiled: February 3, 2014Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150082065Abstract: A mechanism is provided for an integrated circuit with power gating. A power switch is configured to connect and disconnect circuits to a common voltage source. A capacitor tank is configured to supply wakeup charge to a given circuit. A controllable element is connected to the given circuit and to the capacitor tank. The controllable element is configured to controllably connect and disconnect the capacitor tank to the given circuit in order to supply the wakeup charge to the given circuit. The controllable element is configured to, responsive to the power switch disconnecting the given circuit from the common voltage source and to the given circuit being turned on to wakeup, supply the wakeup charge to the given circuit being turned on by transferring the wakeup charge from the capacitor tank to the given circuit. This reduces the electrical charge transferred from the circuits connected to the common voltage source.Type: ApplicationFiled: February 4, 2014Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150081123Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect a circuit to a common voltage source. The circuit is powered off circuit when disconnected. A multiplexer selectably connects a charge pump or common voltage source to a gate terminal of the power header switch. The charge pump provides a higher voltage to the gate terminal than the common voltage source. A controller is configured to control a selection of the multiplexer to the charge pump and the common voltage source. The controller is configured to disconnect the charge pump from the gate terminal and connect the common voltage source to the gate terminal of the power header switch in response to conditions: a prediction of a demand core power-up request, an increase in a gate leakage current, and/or a reduction in temperature of the powered off circuit.Type: ApplicationFiled: September 13, 2013Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150082070Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any one of multiple circuits to a common voltage source, where a powered off circuit is disconnected from the common voltage source. A power-up sequencer includes an initial stages power-up component and a final stages power-up component. The final stages power-up component is configured to execute final stages of a power-up process for the powered off circuit, and the initial stages power-up component is configured to execute initial stages of the power-up process for the powered off circuit. The initial stages power-up component is activated in response to a predictive power-up request.Type: ApplicationFiled: September 13, 2013Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150082069Abstract: A mechanism is provided for an integrated circuit with power gating. A power switch is configured to connect and disconnect circuits to a common voltage source. A capacitor tank is configured to supply wakeup charge to a given circuit. A controllable element is connected to the given circuit and to the capacitor tank. The controllable element is configured to controllably connect and disconnect the capacitor tank to the given circuit in order to supply the wakeup charge to the given circuit. The controllable element is configured to, responsive to the power switch disconnecting the given circuit from the common voltage source and to the given circuit being turned on to wakeup, supply the wakeup charge to the given circuit being turned on by transferring the wakeup charge from the capacitor tank to the given circuit. This reduces the electrical charge transferred from the circuits connected to the common voltage source.Type: ApplicationFiled: September 13, 2013Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150081125Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect a circuit to a common voltage source. The circuit is powered off circuit when disconnected. A multiplexer selectably connects a charge pump or common voltage source to a gate terminal of the power header switch. The charge pump provides a higher voltage to the gate terminal than the common voltage source. A controller is configured to control a selection of the multiplexer to the charge pump and the common voltage source. The controller is configured to disconnect the charge pump from the gate terminal and connect the common voltage source to the gate terminal of the power header switch in response to conditions: a prediction of a demand core power-up request, an increase in a gate leakage current, and/or a reduction in temperature of the powered off circuit.Type: ApplicationFiled: February 4, 2014Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150082066Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any one of multiple circuits to a common voltage source, where a powered off circuit is disconnected from the common voltage source. A power-up sequencer includes an initial stages power-up component and a final stages power-up component. The final stages power-up component is configured to execute final stages of a power-up process for the powered off circuit, and the initial stages power-up component is configured to execute initial stages of the power-up process for the powered off circuit. The initial stages power-up component is activated in response to a predictive power-up request.Type: ApplicationFiled: February 4, 2014Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Publication number: 20150077170Abstract: A mechanism is provided for an integrated circuit with power gating. A power header switch is configured to connect and disconnect any circuits to a common voltage source. A powered off circuit is disconnected from the common voltage source. A first capacitor and a second capacitor are configured to supply wakeup electrical charge to a given circuit of the circuits. The first capacitor and the second capacitor are connectable to the given circuit and the powered off circuit. A controller is configured to controllably connect the first capacitor and/or the second capacitor to the given circuit in order to supply the wakeup electrical charge to the given circuit, when the powered off circuit was previously connected to the first capacitor and/or the second capacitor.Type: ApplicationFiled: September 13, 2013Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Hans Jacobson, Victor Zyuban
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Patent number: 7945765Abstract: An electronic apparatus includes a plurality of stages serially interconnected as a pipeline to perform sequential processings on input operands. A shortening circuit associated with at least one stage of the pipeline recognizes when one or more of input operands for the stage has been predetermined as appropriate for shortening and execute the shortening when appropriate.Type: GrantFiled: January 31, 2008Date of Patent: May 17, 2011Assignee: International Business Machines CorporationInventors: Philip George Emma, Allan Mark Hartstein, Hans Jacobson, William Robert Reohr
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Patent number: 7930578Abstract: A method of power management of a system of connected components includes initializing a token allocation map across the connected components, wherein each component is assigned a power budget as determined by a number of allocated tokens in the token allocation map, monitoring utilization sensor inputs and command state vector inputs, determining, at first periodic time intervals, a current performance level, a current power consumption level and an assigned power budget for the system based on the utilization sensor inputs and the command state vector inputs, and determining, at second periodic time intervals, a token re-allocation map based on the current performance level, the current power consumption level and the assigned power budget for the system, according to a re-assigned power budget of at least one of the connected components, while enforcing a power consumption limit based on a total number of allocated tokens in the system.Type: GrantFiled: September 27, 2007Date of Patent: April 19, 2011Assignee: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Zhigang Hu, Hans Jacobson, Prabhakar N. Kudva, Vijayalakshmi Srinivasan, Victor Zyuban
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Publication number: 20090198970Abstract: An electronic apparatus includes a plurality of stages serially interconnected as a pipeline to perform sequential processings on input operands. A shortening circuit associated with at least one stage of the pipeline recognizes when one or more of input operands for the stage has been predetermined as appropriate for shortening and execute the shortening when appropriate.Type: ApplicationFiled: January 31, 2008Publication date: August 6, 2009Inventors: Philip George Emma, Allan Mark Hartstein, Hans Jacobson, William Robert Reohr