Abstract: A method of processing a semiconductor substrate, including performing a first ion implantation process on the substrate, wherein a first ion beam formed of an ionized first dopant species is directed at a top surface of the substrate and is blocked from a first portion of the substrate while being allowed to implant a second portion of the substrate, and performing a second ion implantation process on the substrate, wherein a second ion beam formed of an ionized second dopant species is directed at the top surface of the substrate and is blocked from the first portion of the substrate while being allowed to implant the second portion of the substrate, wherein an effect of the second ion implantation process on an oxidation rate of the second portion counteracts an effect of the first ion implantation process on the oxidation rate of the second portion.

Abstract: A method of processing a semiconductor substrate, including performing a first ion implantation process on the substrate, wherein a first ion beam formed of an ionized first dopant species is directed at a top surface of the substrate and is blocked from a first portion of the substrate while being allowed to implant a second portion of the substrate, and performing a second ion implantation process on the substrate, wherein a second ion beam formed of an ionized second dopant species is directed at the top surface of the substrate and is blocked from the first portion of the substrate while being allowed to implant the second portion of the substrate, wherein an effect of the second ion implantation process on an oxidation rate of the second portion counteracts an effect of the first ion implantation process on the oxidation rate of the second portion.

Abstract: A finFET device includes an n-doped source and/or drain extension that is disposed between a gate spacer of the finFET and a bulk semiconductor portion of the semiconductor substrate on which the n-doped source or drain extension is disposed. The n-doped source or drain extension is formed by a selective epitaxial growth (SEG) process in a cavity formed proximate the gate spacer.

Abstract: A finFET device includes an n-doped source and/or drain extension that is disposed between a gate spacer of the finFET and a bulk semiconductor portion of the semiconductor substrate on which the n-doped source or drain extension is disposed. The n-doped source or drain extension is formed by a selective epitaxial growth (SEG) process in a cavity formed proximate the gate spacer.

Abstract: A method of forming members of fiber reinforced thermoplastic members via molding, the members including at least one hollow chamber, formed by water injection into the melt in the mold, to stiffen the finished member. The thermoplastic is preferably selected from a group comprising polypropylene, Nylon, PET, ABS, TPO, and thermoplastic polyurethane, while the reinforcing fibers are preferably selected from a group comprising glass, aramid, carbon, and natural fibers. Preferably, the extruded melt is produced such that the average length of the reinforcing fibers is less than four millimeters.

Abstract: An improved method of doping a workpiece is disclosed. In this method, a film comprising the species to be implanted is introduced to the surface of a planar or three-dimensional workpiece. This film can be grown using CVD, a bath or other means. The workpiece with the film is then subjected to ion bombardment to help drive the dopant into the workpiece. This ion bombardment is performed at elevated temperatures to reduce crystal damage and create a more abrupt doped region.

Abstract: A method of forming members of fiber reinforced thermoplastic members via molding, the members including at least one hollow chamber, formed by water injection into the melt in the mold, to stiffen the finished member. The thermoplastic is preferably selected from a group comprising polypropylene, Nylon, PET, ABS, TPO, and thermoplastic polyurethane, while the reinforcing fibers are preferably selected from a group comprising glass, aramid, carbon, and natural fibers. Preferably, the extruded melt is produced such that the average length of the reinforcing fibers is less than four millimeters.

Abstract: A method of producing an antenna structure for an automotive vehicle comprising the steps of providing a substrate element and arranging the antenna structure on one surface of the substrate element.

Abstract: A roof module of a motor vehicle, wherein the roof module is manufactured from a plastic and a roof box device is integrally formed with the roof module in one piece.

Abstract: A roof module of a motor vehicle with at least one securing device for a roof carrier system, the securing device being formed in one piece with the roof module.

Abstract: A method of producing an antenna structure for an automotive vehicle comprising the steps of providing a substrate element and arranging the antenna structure on one surface of the substrate element.

Abstract: A roof module of a motor vehicle, wherein the roof module is manufactured from a plastic and a roof box device is integrally formed with the roof module in one piece.

Abstract: A roof module of a motor vehicle with at least one securing device for a roof carrier system, the securing device being formed in one piece with the roof module.

Abstract: We have found that under certain prescribed conditions a co-implantation process can be effective in increasing the electrical activation of implanted dopant ions. In accordance with one aspect of our invention, a method of making a semiconductor device includes the steps of providing a single crystal semiconductor body, implanting vacancy-generating, ions into a preselected region of the body, implanting dopant ions into the preselected region, the dopant implant forming interstitial defects in the body, and annealing the body to electrically activate the dopant ions. Importantly, in our method the vacancy-generating implant introduces vacancy defects into the preselected region that are effective to annihilate the interstitial defects. In addition, process steps that amorphize the surface of the implanted region are avoided, and the dose of the vacancy-generating implant is made to be greater than that of the dopant implant.

Abstract: We have found that under certain prescribed conditions a co-implantation process can be effective in increasing the electrical activation of implanted dopant ions. In accordance with one aspect of our invention, a method of making a semiconductor device includes the steps of providing a single crystal semiconductor body, implanting vacancy-generating ions into a preselected region of the body, implanting dopant ions into the preselected region, the dopant implant forming interstitial defects in the body, and annealing the body to electrically activate the dopant ions. Importantly, in our method the vacancy-generating implant introduces vacancy defects into the preselected region that are effective to annihilate the interstitial defects. In addition, process steps that amorphize the surface of the implanted region are avoided, and the dose of the vacancy-generating implant is made to be greater than that of the dopant implant.

Abstract: We have discovered that, contrary to conventional wisdom about forming DP defects, electrical saturation in highly doped 2D layers of Si does not occur. In accordance with one aspect of our invention, free-carrier concentrations in excess of about 7×1020 cm−3 can be attained in single crystal Si layers &dgr;-doped with a Group V element. In one embodiment, free-carrier concentrations in excess of about 2×1021 cm−3 are realized in single crystal Si that is &dgr;-doped with Sb. In another embodiment, the &dgr;-doped layer is formed as an integral part of an FET.

Abstract: A method of fabricating an IC comprises the steps of: (a) forming trench isolation regions in a surface of a semiconductor body; and (b) forming a tub-tie region between at least one pair of the trench isolation regions (when viewed in cross-section) by a process that includes the following steps: (b1) forming a first photolithographic mask that covers and is in registration with the tub-tie region; (b2) implanting ions of a first conductivity-type to form a tub region adjacent the tub-tie region; (b3) removing the first mask; (b4) forming a second photolithographic mask that has an opening that exposes most of the underlying tub-tie region but overlaps a first peripheral section on one side of the tub-tie region; (b5) implanting ions to form a pedestal portion of a second conductivity-type within the tub-tie region; and (b6) implanting ions of the first conductivity-type at an acute (preferably non-zero) angle −⊕ with respect to the normal to the surface to the body so as to form a conductivity-t

Abstract: A semiconductor device having a carbon-containing region with an advantageous concentration profile is disclosed. The carbon is introduced into a region of the substrate and at a depth below the space-charge layer of the device and at a concentration such that the carbon atoms absorb point defects created in the substrate during device fabrication but do not adversely affect the leakage characteristics of the device.

Abstract: An IC comprises a tub of a first conductivity type, at least one transistor embedded in the tub, and a first pair of isolating regions defining therebetween a tub-tie region coupled to the tub. The tub-tie region comprises a cap portion of the first conductivity type and an underlying buried pedestal portion of a second conductivity type. At least a top section of the pedestal portion is surrounded by the cap portion so that a conducting path is formed between the cap portion and the tub. In a CMOS IC tub-ties of this design are provided for both NMOS and PMOS transistors. In a preferred embodiment, the cap portion of each tub-tie comprises a relatively heavily doped central section and more lightly doped peripheral sections, both of the same conductivity type.

Abstract: Diffusion of ion-implanted dopant is controlled by incorporating electrically inactive impurity in a semiconductor layer by at least one crystal growth technique.