Abstract: SOI wafers are manufactured by forming on a silicon substrate a monocrystalline first, cubic 1a-3 metal or mixed metal oxide layer whose lattice constant differs from that of the substrate by 5% or less; forming a second cubic 1a-3 mixed metal oxide layer having a lattice constant within 2% of the lattice constant of the first metal or mixed metal oxide layer, and having a graded metal content to vary the lattice content in the second mixed metal oxide layer from that of the first layer, and thermally treating the layered product in an oxygen atmosphere to form an amorphous interlayer between the substrate and the first metal or mixed metal oxide layer.

Abstract: A layered semiconductor wafer contains the following layers in the given order: a monocrystalline substrate wafer (1) containing substantially silicon, a first amorphous intermediate layer (2) of an electrically insulating material having a thickness of 2 nm to 100 nm, a monocrystalline first oxide layer (3) having a cubic Ia-3 crystal structure, a composition of (M12O3)1-x(M22O3)x wherein each of M1 and M2 is a metal and wherein 0?x?1, and a lattice constant which differs from the lattice constant of the material of the substrate wafer by 0% to 5%. The invention also relates to a process for manufacturing such semiconductor wafers by epitaxial deposition.

Abstract: A layered semiconductor wafer contains the following layers in the given order: a monocrystalline substrate wafer (1) containing substantially silicon, a first amorphous intermediate layer (2) of an electrically insulating material having a thickness of 2 nm to 100 nm, a monocrystalline first oxide layer (3) having a cubic Ia-3 crystal structure, a composition of (M12O3)1-x(M22O3)x wherein each of M1 and M2 is a metal and wherein 0?x?1, and a lattice constant which differs from the lattice constant of the material of the substrate wafer by 0% to 5%. The invention also relates to a process for manufacturing such semiconductor wafers by epitaxial deposition.

Abstract: The invention concerns a semiconductor component and an associated production process having a silicon-bearing layer, a praseodymium oxide layer and a mixed oxide layer arranged between the silicon-bearing layer and the praseodymium oxide layer and containing silicon, praseodymium and oxygen. It is possible because of the mixed oxide layer on the one hand to improve the capacitance of the component and on the other hand to achieve a high level of charge carrier mobility without the necessity for a silicon oxide intermediate layer.

Abstract: A layered semiconductor wafer contains the following layers in the given order: a monocrystalline substrate wafer (1) containing substantially silicon, a first amorphous intermediate layer (2) of an electrically insulating material having a thickness of 2 nm to 100 nm, a monocrystalline first oxide layer (3) having a cubic Ia-3 crystal structure, a composition of (M12O3)1-x(M22O3)x wherein each of M1 and M2 is a metal and wherein 0?x?1, and a lattice constant which differs from the lattice constant of the material of the substrate wafer by 0% to 5%. The invention also relates to a process for manufacturing such semiconductor wafers by epitaxial deposition.

Abstract: In accordance with the invention there is provided a semiconductor capacitor having a first semiconductor layer which forms a first capacitor electrode and which includes silicon, a second capacitor electrode and a capacitor dielectric including praseodymium oxide between the capacitor electrodes, in which provided between the capacitor dielectric including praseodymium oxide and at least the first semiconductor layer including silicon is a first thin intermediate layer representing a diffusion barrier for oxygen. In particular the thin intermediate layer can include oxynitride.

Abstract: In accordance with the invention the semiconductor capacitor includes a first capacitor electrode 1, a second capacitor electrode 3 and a capacitor dielectric 5 which is arranged between the two capacitor electrodes and which includes praseodymium oxide. It is distinguished in that the second capacitor electrode 3 includes praseodymium silicide.