Patents by Inventor Hans-Joerg Peter

Hans-Joerg Peter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220397418
    Abstract: A system and method for translating route guidance between a navigation system and a navigation service when different versions of a map database are being used. The navigation service applies a version translation table to identify differences between the map databases and translates route guidance accordingly before it is communicated to the navigation system.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 15, 2022
    Inventors: Stefan Baptist, Hans-Joerg Peter, Benjamin Quattelbaum, Michael Westphal
  • Patent number: 10599800
    Abstract: Formal verification techniques are used to extract valid clock modes from a hardware description of the clock network. In one aspect, the clock network includes primary clocks and configuration signals as inputs, and also includes derived clocks within the clock network. The derived clocks are configurable for different clock modes according to the values of the configuration signals. A parametric liveness property checking is applied to the derived clocks, where the configuration signals are parameters for the parametric liveness property checking. The parametric liveness property checking infers which values of the configuration signals result in valid clock modes for the derived clocks.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: March 24, 2020
    Assignee: Synopsys, Inc.
    Inventors: Mohamed Shaker Sarwary, Hans-Joerg Peter, Guillaume Plassan, Barsneya Chakrabarti, Mohammad Homayoun Movahed-Ezazi
  • Publication number: 20190034571
    Abstract: Formal verification techniques are used to extract valid clock modes from a hardware description of the clock network. In one aspect, the clock network includes primary clocks and configuration signals as inputs, and also includes derived clocks within the clock network. The derived clocks are configurable for different clock modes according to the values of the configuration signals. A parametric liveness property checking is applied to the derived clocks, where the configuration signals are parameters for the parametric liveness property checking. The parametric liveness property checking infers which values of the configuration signals result in valid clock modes for the derived clocks.
    Type: Application
    Filed: July 27, 2018
    Publication date: January 31, 2019
    Inventors: Mohamed Shaker Sarwary, Hans-Joerg Peter, Guillaume Plassan, Barsneya Chakrabarti, Mohammad Homayoun Movahed-Ezazi