Abstract: The invention relates to a method for the selective silicidation of contact areas that allow the production of highly integrated circuits, preferably in a SMOS or BiCMOS process. To this end, a metal oxide layer (14) that contains for example praseodymium oxide is deposited onto a prepared wafer (12). A silicon layer (16) and on top of said silicon layer a cover layer (18) is deposited onto the metal oxide layer (14), said cover layer being laterally structured. In a subsequent tempering step in an oxygen-free, reducing gas atmosphere the silicon layer (16) and the metal oxide layer (14) are converted to a metal silicide layer in lateral sections (20, 22) in which the cover layer (18) was previously removed.

Abstract: A silicon-germanium hetero bipolar transistor comprising a silicon collector layer, a boron-doped silicon-germanium base layer, a silicon emitter layer and an emitter contact area. The transistor is fabricated using an epitaxy process on a surface of pure silicon. An electrically inert material is incorporated into the epitaxial layers in order to link the defects in the semiconductor structure and to reduce the outdiffusion of the dopant. Thus, a transistor for high-frequency applications can be fabricated in two ways: to increase the dopant dose of the base region or to reduce the thickness of the base layer. In particular, the concentration profile of germanium in the base layer has a general shape of a triangle or trapezoid.

Abstract: The invention relates to a method for the selective silicidation of contact areas that allow the production of highly integrated circuits, preferably in a SMOS or BiCMOS process. To this end, a metal oxide layer (14) that contains for example praseodymium oxide is deposited onto a prepared wafer (12). A silicon layer (16) and on top of said silicon layer a cover layer (18) is deposited onto the metal oxide layer (14), said cover layer being laterally structured. In a subsequent tempering step in an oxygen-free, reducing gas atmosphere the silicon layer (16) and the metal oxide layer (14) are converted to a metal silicide layer in lateral sections (20, 22) in which the cover layer (18) was previously removed.

Abstract: A silicon-germanium hetero bipolar transistor comprising a silicon collector layer, a boron-doped silicon-germanium base layer, a silicon emitter layer and an emitter contact area. The transistor is fabricated using an epitaxy process on a surface of pure silicon. An electrically inert material is incorporated into the epitaxial layers in order to link the defects in the semiconductor structure and to reduce the outdiffusion of the dopant. Thus, a transistor for high-frequency applications can be fabricated in two ways: to increase the dopant dose of the base region or to reduce the thickness of the base layer. In particular, an implantation or doped region having a T-shaped cross section profile is provided between the emitter layer and the emitter contact area.

Abstract: A silicon-germanium hetero bipolar transistor comprising a silicon collector layer, a boron-doped silicon-germanium base layer, a silicon emitter layer and an emitter contact area. The transistor is fabricated using an epitaxy process on a surface of pure silicon. An electrically inert material is incorporated into the epitaxial layers in order to link the defects in the semiconductor structure and to reduce the outdiffusion of the dopant. Thus, a transistor for high-frequency applications can be fabricated in two ways: to increase the dopant dose of the base region or to reduce the thickness of the base layer. In particular, carbon is incorporated in the base layer and in the collector layer and/or emitter layer.

Abstract: The invention relates to a silicon germanium hetero bipolar transistor and a method of fabricating the epitaxial individual layers of a silicon germanium hetero bipolar transistor.

Abstract: The invention relates to a silicon germanium hetero bipolar transistor and a method of fabricating the epitaxial individual layers of a silicon germanium hetero bipolar transistor.

Abstract: The invention relates to a silicon germanium hetero bipolar transistor and a method of fabricating the epitaxial individual layers of a silicon germanium hetero bipolar transistor.