Abstract: The invention relates to a method for the application of a lubricant layer to a frictionally stressed surface of an object, and to a corresponding object, the lubricant layer, in use, containing boric acid. For production, the object is introduced into a reactor and the reactor is evacuated. Then, to produce an adhesion-promoter layer, a process gas is introduced, which contains boron, nitrogen and/or carbon at least in the form of a compound or releases the corresponding element under process conditions, and penetrates into the region of the surface of the object, in particular by diffusion. To produce an intermediate layer containing boron and oxygen, a second precursor material, which contains boron at least in the form of a compound and releases the boron under process conditions, and a first precursor material, which contains oxygen at least in the form of a compound and releases the oxygen under process conditions, are introduced into the depositing gas phase.

Abstract: The invention relates to a method for producing heteroepitaxial diamond layers on Si-substrates by means of CVD and standard process gases, in which (a) during the nucleation phase a negative bias voltage is applied to the Si-substrate and (b) following the nucleation phase diamond deposition takes place.

Abstract: The invention relates to a composite structure for an electronic component with an undoped diamond layer, at least one side of which is covered by a doped non-diamond layer, arranged on a growth substrate. The diamond layer has a thickness of less than 0.5 .mu.m. In addition, the conduction and/or valence bands of the diamond layer and the nondiamond layer exhibit such a band discontinuity that charge carries from the doped non-diamond layer which are excited optically and/or thermally, for example, can be drawn, with a reduction of their potential energy, into the valence and/or conduction band of the undoped diamond layer. This configuration causes a potential well to exist in the area of the diamond layer, at least in one direction, with a quantizing effect for the charge carriers drawn into the diamond layer.

Abstract: An integrated circuit chip has full trench dielectric isolation of each portion of the chip. Initially the chip substrate is of conventional thickness and has semiconductor devices formed in it. After etching trenches in the substrate and filling them with dielectric material, a heat sink cap is attached to the passivation layer on the substrate front side surface. The passivation layer is a CVD diamond film which provides both electrical insulation and thermal conductivity. The substrate backside surface is removed (by grinding and/or CMP) to expose the bottom portion of the trenches. This fully isolates each portion of the die and eliminates mechanical stresses at the trench bottoms. Thereafter drain or collector electrical contacts are provided on the substrate backside surface. In a flip chip version, frontside electrical contacts extend through the frontside passivation layer to the heat sink cap.