Patents by Inventor Hans L. Yeager

Hans L. Yeager has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240063715
    Abstract: A power delivery sub-system included in a computer system employs a primary voltage regulator circuit that generates a primary supply voltage on a primary power supply node. The power delivery sub-system also includes multiple bypass voltage regulator circuits that source corresponding bypass currents to a local power supply nodes in an integrated circuit. The integrated circuit includes multiple circuit blocks coupled to corresponding ones of the local power supply nodes, and multiple local voltage regulator circuits coupled to the primary power supply node. When a voltage level of a given local power supply node drops below a threshold value, a corresponding local voltage regulator circuit sources a supply current to the given local power supply node.
    Type: Application
    Filed: August 16, 2022
    Publication date: February 22, 2024
    Inventors: Alexander B. Uan-Zo-li, Shuai Jiang, Jamie L. Langlinais, Per H. Hammarlund, Hans L. Yeager, Victor Zyuban, Sung J. Kim, Wei Xu, Rohan U. Mandrekar, Sambasivan Narayan, Mohamed H. Abu-Rahma, Jaroslav Raszka, Robert O. Bruckner
  • Patent number: 6891400
    Abstract: A Dual Rail Time Borrowing Multiplexer (DTBM) generates a dual rail output from a single rail input with a one gate equivalent delay using a negative set up time. In one embodiment, a multiplexer includes a cross-coupled differential domino circuit coupled to a transistor array and to a data input and an enable input through a first and second circuit. The multiplexer outputs a dual rail output corresponding to a selected data input with a one gate equivalent delay using a negative set up time.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: May 10, 2005
    Assignee: Intel Corporation
    Inventors: Hans L. Yeager, Scott E. Siers, Andrew D. Gerwitz
  • Publication number: 20040217779
    Abstract: A Dual Rail Time Borrowing Multiplexer (DTBM) generates a dual tail output from a single rail input with a one gate equivalent delay using a negative set up time. In one embodiment, a multiplexer includes a cross-coupled differential domino circuit coupled to a transistor array and to a data input and an enable input through a first and second circuit. The multiplexer outputs a dual rail output corresponding to a selected data input with a one gate equivalent delay using a negative set up time.
    Type: Application
    Filed: April 30, 2003
    Publication date: November 4, 2004
    Applicant: Intel Corporation
    Inventors: Hans L. Yeager, Scott E. Siers, Andrew D. Gerwitz
  • Patent number: 6784695
    Abstract: A domino circuit topology that includes a dynamic circuit, logic circuit, and static circuit. The domino circuit includes a dynamic circuit, logic circuit, and static circuit coupled through a central node. The dynamic circuit includes a pre-charge circuit and a keeper circuit for pre-charging the central node and keeping the central node at its current voltage level. The static circuit provides a static output for the domino circuit. The logic circuit provides logical functions for input signals. In addition, the domino circuit can include an isolation transistor coupled between the central node and the logic circuit.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: Hans L. Yeager, Scott E. Siers, Brian T. Ormson
  • Publication number: 20040164768
    Abstract: A domino circuit topology that includes a dynamic circuit, logic circuit, and static circuit. The domino circuit includes a dynamic circuit, logic circuit, and static circuit coupled through a central node. The dynamic circuit includes a pre-charge circuit and a keeper circuit for pre-charging the central node and keeping the central node at its current voltage level. The static circuit provides a static output for the domino circuit. The logic circuit provides logical functions for input signals. In addition, the domino circuit can include an isolation transistor coupled between the central node and the logic circuit.
    Type: Application
    Filed: February 21, 2003
    Publication date: August 26, 2004
    Applicant: Intel Corporation
    Inventors: Hans L. Yeager, Scott E. Siers, Brian T. Ormson