Abstract: A phase-locked loop (PLL) architecture (100) is provided that includes a voltage-controlled oscillator (VCO) (116). The PLL architecture (100) also includes a digital calibration loop (132) coupled to the VCO (116). The digital calibration loop (132) implements a digital filter (126) to provide a digital control to the VCO (116) for centering a VCO frequency output. The PLL architecture (100) also includes an analog calibration loop (130) coupled to the VCO (116). The analog calibration loop (130) provides an analog control to the VCO (116) for adjusting the centered VCO frequency output.

Abstract: The present method and apparatus for electrically characterizing a pin grid array includes a plurality of conductive caps which may be removably fitted over chosen pins of the pin grid array, and a conductive fixture having a plurality of passages therethrough which correspond to the pins of the pin grid array. The passages are sized so that the caps come in close proximity to the fixture with the fixture so positioned on the pin grid array, while each pin which does not have a cap thereon is not in contact with the fixture but defines an air gap with the fixture. Electrical probing may then take place between the fixture, which connects a number of pins through the caps, and a pin not in contact with the fixture to gain electrical characterization information of the pin grid array.