Patents by Inventor Hanxi Chen

Hanxi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129748
    Abstract: An unlicensed spectrum communication converter system and method allows 3GPP compliant integrated circuits (LTE, 5G) to be used in a unlicensed spectrum band communication system. In one implementation, each of the unlicensed spectrum base station and unlicensed spectrum user equipment (UE) may include a translation layer. The unlicensed spectrum communication converter system and method may be used with various unlicensed spectrums including, for example, television whitespace (TVWS) unlicensed spectrum, citizens broadband radio service (CBRS) and Wi-Fi (including all UNII bands from UNII-1 to UNII-8).
    Type: Application
    Filed: October 11, 2023
    Publication date: April 18, 2024
    Applicant: WiFrost, Inc.
    Inventors: Tao Chen, Muhammad Qayyum, Hanxi Chen
  • Publication number: 20240129784
    Abstract: A system and method for dynamic filtering permits a base station of an unlicensed spectrum communication system to filter out interference from an adjacent transmitter. In one embodiment, the unlicensed spectrum is television whitespace and the adjacent transmitter is a television broadcast transmitter.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Applicant: WiFrost, Inc.
    Inventors: Muhammad Qayyum, Tao Chen, Hanxi Chen
  • Patent number: 11876421
    Abstract: An iron core assembly, a motor, a compressor and a vehicle are provided. The iron core assembly has an iron core body and multiple insulating skeletons. The iron core body has multiple iron core blocks. A mounting groove is provided at an edge of at least one end face of each iron core block. Each iron core block is arranged between two insulating skeletons. Out of the two insulating skeletons provided at two ends of an iron core block, an end face of at least one insulating skeleton, facing the iron core block, is provided with insulating protrusions. The insulating protrusions can wrap two sides of the iron core block. The insulating protrusions match the mounting groove.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: January 16, 2024
    Assignee: GUANGDONG WELLING AUTO PARTS CO., LTD.
    Inventors: Hanxi Chen, Guowei Sun
  • Publication number: 20220060076
    Abstract: An iron core assembly, a motor, a compressor and a vehicle are provided. The iron core assembly has an iron core body and multiple insulating skeletons. The iron core body has multiple iron core blocks. A mounting groove is provided at an edge of at least one end face of each iron core block. Each iron core block is arranged between two insulating skeletons. Out of the two insulating skeletons provided at two ends of an iron core block, an end face of at least one insulating skeleton, facing the iron core block, is provided with insulating protrusions. The insulating protrusions can wrap two sides of the iron core block. The insulating protrusions match the mounting groove.
    Type: Application
    Filed: November 4, 2021
    Publication date: February 24, 2022
    Applicant: GUANGDONG WELLING AUTO PARTS CO., LTD.
    Inventors: Hanxi CHEN, Guowei SUN
  • Patent number: 6472900
    Abstract: A method and system providing for electrical testing of an integrated semiconductor substrate having at least two signal processing layers. The substrate may be provided with a protective layer of plastic, silicon, silicon oxide, silicon nitride or the like. A selected region of one substrate layer to be tested electrically is exposed by etching or otherwise forming a controllably small aperture any overlying substrate layer(s) away to expos at least one selected circuit trace in the selected region and applying a selected electrical signal to the trace. Optionally, a second aperture, spaced apart from the first aperture, can be formed to expose a second selected circuit trace so that propagation of a signal in one or more substrate circuits can be tested. The aperture cross-sectional shapes may be linear or curvilinear polygons or other suitable shapes.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: October 29, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Deviprasad Malladi, Shahid Ansari, Hanxi Chen, Bidyut Sen, Steven Boyle
  • Patent number: 6246252
    Abstract: A method for providing for electrical testing of an integrated semiconductor substrate having at least two signal processing layers. The substrate may be provided with a protective layer of plastic, silicon, silicon oxide, silicon nitride or the like. A selected region of one substrate layer to be tested electrically is exposed by etching or otherwise forming a controllably small aperture any overlying substrate layer(s) away to expose at least one selected circuit trace in the selected region and applying a selected electrical signal to the trace. Optionally, a second aperture, spaced apart from the first aperture, can be formed to expose a second selected circuit trace so that propagation of a signal in one or more substrate circuits can be tested. The aperture cross-sectional shapes may be linear or curvilinear polygons or other suitable shapes.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: June 12, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Deviprasad Malladi, Shahid Ansari, Hanxi Chen, Bidyut Sen, Steven Boyle