Abstract: One embodiment of the present invention provides a system that facilitates setting a core voltage for a central processing unit (CPU) contained within a CPU chip in a computer system. During operation, the system applies an I/O voltage to the CPU chip, thereby enabling I/O buffers within the CPU chip to drive I/O pins on the CPU chip. Next, the system reads a selected set of I/O pins on the CPU chip, wherein the selected set of I/O pins specify an initial core voltage for the CPU. This allows the system to apply the initial core voltage to the CPU chip to enable the CPU to operate. When the CPU is able to operate, the system reads a CPU identifier from the CPU chip, and uses the CPU identifier to lookup an optimal core voltage for the CPU. This allows the system to apply the optimal core voltage to the CPU chip.