Patents by Inventor Hao-An Chuang
Hao-An Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12294012Abstract: Image sensor structures are provided. In some embodiments, an image sensor structure is provided. The image sensor structure includes a substrate and a light-sensing region formed in the substrate and extending from the top surface to the bottom surface of the substrate. The image sensor structure further includes a first isolation structure extending from the top surface of the substrate to a middle portion of the substrate and a second isolation structure formed extending from the bottom surface of the substrate to the middle portion of the substrate and in contact with the first isolation structure. The image sensor structure further includes a gate structure overlapping the light-sensing region, the first isolation structure, and the second isolation structure and a cap layer overlapping the gate structure, the light-sensing region, the first isolation structure, and the second isolation structure in a top view.Type: GrantFiled: July 27, 2023Date of Patent: May 6, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yuichiro Yamashita, Chun-Hao Chuang, Hirofumi Sumi
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Patent number: 12278249Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.Type: GrantFiled: November 21, 2023Date of Patent: April 15, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Chien Yu, Ting-Cheng Chang, Wen-Hau Wu, Chih-Kung Chang
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Patent number: 12278254Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes forming a first image sensor element within a first substrate and a second image sensor element within a second substrate. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths and the second image sensor element is configured to generate electrical signals from electromagnetic radiation within a second range of wavelengths. A plurality of deposition processes are performed to form a band-pass filter over the second substrate. The band-pass filter has a plurality of alternating layers of a first material having a first refractive index and a second material having a second refractive index that is less than the first refractive index. The first substrate is bonded to the band-pass filter.Type: GrantFiled: July 17, 2023Date of Patent: April 15, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
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Publication number: 20250107245Abstract: An electrostatic discharge protection device includes a P-type substrate, an N-type well, a first P-type heavily-doped area, an N-type doped area, and a first N-type heavily-doped area. The N-type well is formed in the P-type substrate. The first P-type heavily-doped area is formed in the N-type well. The N-type doped area and the first N-type heavily-doped area are formed in the P-type substrate. The N-type doped area is coupled to the N-type well through an external conductive wire decoupled to the first P-type heavily-doped area. Alternatively, the P-type substrate and the N-type well are respectively replaced with an N-type substrate and a P-type well.Type: ApplicationFiled: September 26, 2023Publication date: March 27, 2025Applicant: AMAZING MICROELECTRONIC CORP.Inventors: Chih-Wei CHEN, Che-Hao CHUANG, Kun-Hsien LIN
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Publication number: 20250107268Abstract: A plurality of holes in a top surface of a silicon medium form a plurality of sub-meta lenses to result in multiple focal points rather than a single point (resulting from using a single meta lens). As a result, optical paths for incoming light are reduced as compared with a single optical path associated with a single meta lens, which in turn reduces angular response of incident photons. Thus, a pixel sensor including the plurality of sub-meta lenses experiences improved light focus and greater signal-to-noise ratio. Additionally, dimensions of the pixel sensor are reduced (particularly a height of the pixel sensor), which allows for greater miniaturization of an image sensor that includes the pixel sensor.Type: ApplicationFiled: September 22, 2023Publication date: March 27, 2025Inventors: Yi-Hsuan WANG, Cheng Yu HUANG, Chun-Hao CHUANG, Keng-Yu CHOU, Wen-Hau WU, Wei-Chieh CHIANG, Chih-Kung CHANG
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Publication number: 20250098343Abstract: Various embodiments of the present application are directed towards an image sensor including a wavelength tunable narrow band filter, as well as methods for forming the image sensor. In some embodiments, the image sensor includes a substrate, a first photodetector, a second photodetector, and a filter. The first and second photodetectors neighbor in the substrate. The filter overlies the first and second photodetectors and includes a first distributed Bragg reflector (DBR), a second DBR, and a first interlayer between the first and second DBRs. A thickness of the first interlayer has a first thickness value overlying the first photodetector and a second thickness value overlying the second photodetector. In some embodiments, the filter is limited to a single interlayer. In other embodiments the filter further includes a second interlayer defining columnar structures embedded in the first interlayer and having a different refractive index than the first interlayer.Type: ApplicationFiled: December 4, 2024Publication date: March 20, 2025Inventors: Cheng Yu Huang, Chun-Hao Chuang, Kazuaki Hashimoto, Keng-Yu Chou, Wei Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
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Publication number: 20250089393Abstract: Various embodiments of the present application are directed to a narrow band filter with high transmission and an image sensor comprising the narrow band filter. In some embodiments, the filter comprises a first distributed Bragg reflector (DBR), a second DBR, a defect layer between the first and second DBRs, and a plurality of columnar structures. The columnar structures extend through the defect layer and have a refractive index different than a refractive index of the defect layer. The first and second DBRs define a low transmission band, and the defect layer defines a high transmission band dividing the low transmission band. The columnar structures shift the high transmission band towards lower or higher wavelengths depending upon a refractive index of the columnar structures and a fill factor of the columnar structures.Type: ApplicationFiled: November 22, 2024Publication date: March 13, 2025Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
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Patent number: 12248019Abstract: A diode test module and method applicable to the diode test module are provided. A substrate having first conductivity type and an epitaxial layer having second conductivity type on the substrate are formed. A well region having first conductivity type is formed in the epitaxial layer. A first and second heavily doped region having second conductivity type are theoretically formed in the well and connected to a first and second I/O terminal, respectively. Isolation trench is formed there in between for electrical isolation. A monitor cell comprising a third and fourth heavily doped region is provided in a current conduction path between the first and second I/O terminal when inputting an operation voltage. By employing the monitor cell, the invention achieves to determine if the well region is missing by measuring whether a leakage current is generated without additional testing equipment and time for conventional capacitance measurements.Type: GrantFiled: November 29, 2021Date of Patent: March 11, 2025Assignee: AMAZING MICROELECTRONIC CORP.Inventors: Chih-Ting Yeh, Sung Chih Huang, Kun-Hsien Lin, Che-Hao Chuang
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Patent number: 12242350Abstract: During operation, a controller node, in multiple nodes in a cluster, may provide to the multiple nodes a set of operations associated with an update of controller software for a controller, where at least the controller node implements the controller. Moreover, at least a first node in the multiple nodes may perform the set of operations associated with the update of the controller software. Furthermore, at least a second node in the multiple nodes may monitor the performing of the set of operations by at least the first node. When the performing of the set of operations is completed by at least the first node, the first node may terminate the performing of the set of operations by the multiple nodes. Alternatively, when a failure occurs during the update of the controller software, at least the first node or the second node may automatically recover the multiple nodes.Type: GrantFiled: March 30, 2023Date of Patent: March 4, 2025Assignee: Ruckus IP Holdings LLCInventors: Hung Fu Chen, Hao Chuang, Chin Hou Chou
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Patent number: 12218301Abstract: A manufacturing method of an electronic device includes: forming a conductive material layer on a substrate, the conductive material layer continuously extends from a first surface of the substrate to a second surface while passing through a side surface, wherein the side surface connects the first surface and the second surface, forming a first protection layer on the conductive material layer and patterning the conductive material layer by using the first protection layer as a mask to form an edge wire, wherein the edge wire is retracted relative to the first protection layer and forms an undercut structure, and forming a second protection layer on the substrate, wherein the second protection layer fills the undercut structure.Type: GrantFiled: January 16, 2024Date of Patent: February 4, 2025Assignee: AUO CorporationInventors: Chih-Wen Lu, Hao-An Chuang, Chun-Yueh Hou
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Patent number: 12211871Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.Type: GrantFiled: March 18, 2021Date of Patent: January 28, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng Yu Huang, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
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Publication number: 20250029949Abstract: A wafer stacking process is provided in the present invention, including steps of forming a silicon oxide layer on a sacrificial carrier, bonding the silicon oxide layer with a dielectric layer on a front side of a silicon substrate, performing a thinning process on the back side of the silicon substrate to expose TSVs therewithin, bonding the back side of the silicon substrate with another silicon substrate, repeating the thinning process and the process of bonding another silicon substrate above so as to form a wafer stacking structure, and performing a removing process to completely remove the sacrificial carrier.Type: ApplicationFiled: November 1, 2023Publication date: January 23, 2025Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Chih-Feng Sung, Chih-Hao Chuang, Chun-Lin Lu, Shih-Ping Lee, Li-Han Chiu, Yi-Kai Wu
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Patent number: 12199128Abstract: Various embodiments of the present application are directed towards an image sensor including a wavelength tunable narrow band filter, as well as methods for forming the image sensor. In some embodiments, the image sensor includes a substrate, a first photodetector, a second photodetector, and a filter. The first and second photodetectors neighbor in the substrate. The filter overlies the first and second photodetectors and includes a first distributed Bragg reflector (DBR), a second DBR, and a first interlayer between the first and second DBRs. A thickness of the first interlayer has a first thickness value overlying the first photodetector and a second thickness value overlying the second photodetector. In some embodiments, the filter is limited to a single interlayer. In other embodiments the filter further includes a second interlayer defining columnar structures embedded in the first interlayer and having a different refractive index than the first interlayer.Type: GrantFiled: June 30, 2022Date of Patent: January 14, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng Yu Huang, Chun-Hao Chuang, Kazuaki Hashimoto, Keng-Yu Chou, Wei Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
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Publication number: 20240427385Abstract: Managing sensor states of an IHS, including detecting, at a first time, a first static state of a first body and a second body of the IHS, the first body coupled to the second body; in response to detecting the first static state of the first body and the second body of the IHS: receiving, from a first sensor of a pair of sensors of the IHS, a first signal, determining, based on the first signal, a first positional state of the first body with respect to the second body of the IHS, disabling the second sensor from the pair of sensors; detecting, at a second time after the first time, a rotation of the first body with respect to the second body; in response to detecting the rotation of the first body with respect to the second body: enabling the second sensor from the pair of sensors.Type: ApplicationFiled: June 21, 2023Publication date: December 26, 2024Inventors: YU-HAO CHUANG, CHEN-HSIN CHANG, YAOTSUNG CHANG
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Publication number: 20240429257Abstract: An image sensing device includes a germanium sensor within a semiconductor body and a metalens formed in the back side of the semiconductor body. The metalens is structured to focus infrared light on the germanium sensor and may have a lower profile than an equivalent microlens. Optionally, the metalens is combined with a microlens to achieve a desired focal length. The metalens, or the metalens in combination with a microlens, overcomes a manufacturing process limitation on the focal length of the microlens, which in turn eliminates the need for, or reduces the thickness of, a spacer between the microlens and the germanium sensor. Eliminating the spacer or reducing its thickness improves the angular response of the image sensing device.Type: ApplicationFiled: June 26, 2023Publication date: December 26, 2024Inventors: Yi-Hsuan Wang, Cheng Yu Huang, Chun-Hao Chuang, Keng-Yu Chou, Wen-Hau Wu, Wei-Chieh Chiang, Chih-Kung Chang
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Publication number: 20240421146Abstract: A bipolar junction transistor is provided, including a semiconductor substrate and a doped layer of a first conductivity type, a doped well region of a second conductivity type formed in the doped layer, a first, second heavily doped region of the second conductivity type, and a third, fourth and fifth heavily doped region of the first conductivity type in the doped well region. The fifth heavily doped region is coupled with a first pin. The third and fourth heavily doped regions are coupled with a second pin. A sixth and seventh heavily doped region of the first conductivity type are disposed in the doped layer. The sixth and first heavily doped regions are connected in common. The seventh and second heavily doped regions are connected in common. When applying either a positive or negative surged mode, the bipolar junction transistor is formed, having both lateral and vertical conducting paths.Type: ApplicationFiled: June 13, 2023Publication date: December 19, 2024Applicant: AMAZING MICROELECTRONIC CORP.Inventors: Sung-Chih HUANG, Chih-Ting YEH, Che-Hao CHUANG
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Patent number: 12154924Abstract: Various embodiments of the present application are directed to a narrow band filter with high transmission and an image sensor comprising the narrow band filter. In some embodiments, the filter comprises a first distributed Bragg reflector (DBR), a second DBR, a defect layer between the first and second DBRs, and a plurality of columnar structures. The columnar structures extend through the defect layer and have a refractive index different than a refractive index of the defect layer. The first and second DBRs define a low transmission band, and the defect layer defines a high transmission band dividing the low transmission band. The columnar structures shift the high transmission band towards lower or higher wavelengths depending upon a refractive index of the columnar structures and a fill factor of the columnar structures.Type: GrantFiled: April 21, 2021Date of Patent: November 26, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
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Publication number: 20240387594Abstract: Image sensor structures are provided. In some embodiments, an image sensor structure is provided. The image sensor structure includes a substrate and a light-sensing region formed in the substrate and extending from the top surface to the bottom surface of the substrate. The image sensor structure further includes a first isolation structure extending from the top surface of the substrate to a middle portion of the substrate and a second isolation structure formed extending from the bottom surface of the substrate to the middle portion of the substrate and in contact with the first isolation structure.Type: ApplicationFiled: July 30, 2024Publication date: November 21, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yuichiro YAMASHITA, Chun-Hao CHUANG, Hirofumi SUMI
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Patent number: 12148783Abstract: Various embodiments of the present disclosure are directed towards an image sensor device including a first image sensor element and a second image sensor element disposed within a substrate. An interconnect structure is disposed along a front-side surface of the substrate and comprises a plurality of conductive wires, a plurality of conductive vias, and a first absorption structure. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths. The second image sensor element is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The second image sensor element is laterally adjacent to the first image sensor element. Further, the first image sensor element overlies the first absorption structure and is spaced laterally between opposing sidewalls of the first absorption structure.Type: GrantFiled: March 30, 2021Date of Patent: November 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Keng-Yu Chou, Cheng Yu Huang, Chun-Hao Chuang, Wen-Hau Wu, Wei-Chieh Chiang, Wen-Chien Yu, Chih-Kung Chang
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Publication number: 20240379703Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.Type: ApplicationFiled: July 21, 2024Publication date: November 14, 2024Inventors: Cheng Yu Huang, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang