Abstract: A wafer stacking process is provided in the present invention, including steps of forming a silicon oxide layer on a sacrificial carrier, bonding the silicon oxide layer with a dielectric layer on a front side of a silicon substrate, performing a thinning process on the back side of the silicon substrate to expose TSVs therewithin, bonding the back side of the silicon substrate with another silicon substrate, repeating the thinning process and the process of bonding another silicon substrate above so as to form a wafer stacking structure, and performing a removing process to completely remove the sacrificial carrier.

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes an active region including a channel region and a source/drain region and extending along a first direction, and a source/drain contact structure over the source/drain region. The source/drain contact structure includes a base portion extending lengthwise along a second direction perpendicular to the first direction, and a via portion over the base portion. The via portion tapers away from the base portion.

Abstract: A device includes a substrate. A first channel region of a first transistor overlies the substrate and a source/drain region is in contact with the first channel region. The source/drain region is adjacent to the first channel region along a first direction, and the source/drain region has a first surface opposite the substrate and side surfaces extending from the first surface. A dielectric fin structure is adjacent to the source/drain region along a second direction that is transverse to the first direction, and the dielectric fin structure has an upper surface, a lower surface, and an intermediate surface that is disposed between the upper and lower surfaces. A silicide layer is disposed on the first surface and the side surfaces of the source/drain region and on the intermediate surface of the dielectric fin structure.

Abstract: An information handling system includes a memory and a processor. The memory stores a current basic input/output system (BIOS) firmware image. During a regular boot mode of the information handling, the processor creates a first set of tables associated with the current BIOS firmware image, stores the first tables to the memory, and receives a BIOS firmware update image. During a BIOS update boot mode of the information handling system, the processor creates a second plurality of tables associated with the BIOS firmware update image, and compares the first and second tables. In response to a difference being determined between the first and second tables, the processor aborts the BIOS update boot mode and generate an error log.

Abstract: Various embodiments of the present application are directed towards an image sensor including a wavelength tunable narrow band filter, as well as methods for forming the image sensor. In some embodiments, the image sensor includes a substrate, a first photodetector, a second photodetector, and a filter. The first and second photodetectors neighbor in the substrate. The filter overlies the first and second photodetectors and includes a first distributed Bragg reflector (DBR), a second DBR, and a first interlayer between the first and second DBRs. A thickness of the first interlayer has a first thickness value overlying the first photodetector and a second thickness value overlying the second photodetector. In some embodiments, the filter is limited to a single interlayer. In other embodiments the filter further includes a second interlayer defining columnar structures embedded in the first interlayer and having a different refractive index than the first interlayer.

Abstract: Managing sensor states of an IHS, including detecting, at a first time, a first static state of a first body and a second body of the IHS, the first body coupled to the second body; in response to detecting the first static state of the first body and the second body of the IHS: receiving, from a first sensor of a pair of sensors of the IHS, a first signal, determining, based on the first signal, a first positional state of the first body with respect to the second body of the IHS, disabling the second sensor from the pair of sensors; detecting, at a second time after the first time, a rotation of the first body with respect to the second body; in response to detecting the rotation of the first body with respect to the second body: enabling the second sensor from the pair of sensors.

Abstract: An image sensing device includes a germanium sensor within a semiconductor body and a metalens formed in the back side of the semiconductor body. The metalens is structured to focus infrared light on the germanium sensor and may have a lower profile than an equivalent microlens. Optionally, the metalens is combined with a microlens to achieve a desired focal length. The metalens, or the metalens in combination with a microlens, overcomes a manufacturing process limitation on the focal length of the microlens, which in turn eliminates the need for, or reduces the thickness of, a spacer between the microlens and the germanium sensor. Eliminating the spacer or reducing its thickness improves the angular response of the image sensing device.

Abstract: A bipolar junction transistor is provided, including a semiconductor substrate and a doped layer of a first conductivity type, a doped well region of a second conductivity type formed in the doped layer, a first, second heavily doped region of the second conductivity type, and a third, fourth and fifth heavily doped region of the first conductivity type in the doped well region. The fifth heavily doped region is coupled with a first pin. The third and fourth heavily doped regions are coupled with a second pin. A sixth and seventh heavily doped region of the first conductivity type are disposed in the doped layer. The sixth and first heavily doped regions are connected in common. The seventh and second heavily doped regions are connected in common. When applying either a positive or negative surged mode, the bipolar junction transistor is formed, having both lateral and vertical conducting paths.

Abstract: Various embodiments of the present application are directed to a narrow band filter with high transmission and an image sensor comprising the narrow band filter. In some embodiments, the filter comprises a first distributed Bragg reflector (DBR), a second DBR, a defect layer between the first and second DBRs, and a plurality of columnar structures. The columnar structures extend through the defect layer and have a refractive index different than a refractive index of the defect layer. The first and second DBRs define a low transmission band, and the defect layer defines a high transmission band dividing the low transmission band. The columnar structures shift the high transmission band towards lower or higher wavelengths depending upon a refractive index of the columnar structures and a fill factor of the columnar structures.

Abstract: Image sensor structures are provided. In some embodiments, an image sensor structure is provided. The image sensor structure includes a substrate and a light-sensing region formed in the substrate and extending from the top surface to the bottom surface of the substrate. The image sensor structure further includes a first isolation structure extending from the top surface of the substrate to a middle portion of the substrate and a second isolation structure formed extending from the bottom surface of the substrate to the middle portion of the substrate and in contact with the first isolation structure.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor device including a first image sensor element and a second image sensor element disposed within a substrate. An interconnect structure is disposed along a front-side surface of the substrate and comprises a plurality of conductive wires, a plurality of conductive vias, and a first absorption structure. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths. The second image sensor element is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The second image sensor element is laterally adjacent to the first image sensor element. Further, the first image sensor element overlies the first absorption structure and is spaced laterally between opposing sidewalls of the first absorption structure.

Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.

Abstract: Some embodiments relate to a CMOS image sensor disposed on a substrate. A plurality of pixel regions comprising a plurality of photodiodes, respectively, are configured to receive radiation that enters a back-side of the substrate. A boundary deep trench isolation (BDTI) structure is disposed at boundary regions of the pixel regions, and includes a first set of BDTI segments extending in a first direction and a second set of BDTI segments extending in a second direction perpendicular to the first direction to laterally surround the photodiode. The BDTI structure comprises a first material. A pixel deep trench isolation (PDTI) structure is disposed within the BDTI structure and overlies the photodiode. The PDTI structure comprises a second material that differs from the first material, and includes a first PDTI segment extending in the first direction such that the first PDTI segment is surrounded by the BDTI structure.

Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.

Abstract: A product information identification and sealed product ensuring system consists essentially of an electronic label seal and an information reading device. The electronic label seal is mainly composed of a conductive loop antenna. An information reading device can sense the electronic label seal through near-field communication, and obtain a unique identification code of the electronic label seal and a link it carries. The information reading device can execute the link and obtain a product information corresponding to the electronic label seal. Additionally, a special adhesive is used to print a circuit antenna of the electronic label seal, so that the electronic label seal is for one-time use only. After the circuit antenna is torn off, connection between the circuit antenna and a chip is damaged, resulting in loss of its original sealing characteristic.

Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes at least one device on a front side of a semiconductor substrate. A plurality of grating layers are under the at least one device. The plurality of grating layers include at least a first material having a first refractive index alternating with a second material having a second refractive index. Contacts extend through an interlevel dielectric material, and further extend through the semiconductor substrate, to directly contact at least one of the first material and the second material below the at least one device and below the semiconductor substrate underlying the interlevel dielectric material.

Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.

Abstract: A circuit device includes a circuit substrate, a protective layer and a side trace. The circuit substrate has a first surface, a second surface opposite to the first surface, and a side surface. A first turning region is provided between the first surface and the side surface. A second turning region is provided between the second surface and the side surface. The circuit substrate includes a carrier plate and a first circuit structure. The first circuit structure is located on the carrier plate, and includes a pad located on the first surface. The protective layer at least partially covers the first turning region and the second turning region. A material of the protective layer includes cured silver paste, epoxy resin or an acrylic-based insulating material. The side trace is located on the protective layer, and extends from the pad across the side surface to the second surface.