Abstract: Disclosed in the present invention is a signal transmission method for a multi-antenna multi-user TDD communication system. Each frame of the TDD communication system includes one forward downlink frame synchronization signal, multiple downlink data time slots, and multiple uplink data time slots; the downlink frame synchronization signal is a broadcast signal, the base station sends the downlink frame synchronization signal to all terminals, and after each terminal receives the downlink frame synchronization signal, time and frequency synchronization is performed with reference to the base station to acquire the start time and end time of each uplink data time slot. The synchronization signal received power P is evaluated and compared with the synchronization signal received power range of all uplink data time slots in the frame, and all terminals falling into the synchronization signal received power range of the uplink data time slot k select the uplink data time slot k to send data.

Abstract: A FinFET device structure is provided. The FinFET device structure includes a substrate, a fin structure formed over the substrate, and an isolation structure formed over the substrate. The fin structure protrudes from the isolation structure. The FinFET device structure further includes a fin isolation structure formed over the isolation structure and a metal gate structure formed over the fin structure and the fin isolation structure.

Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement comprises a conductive contact in contact with a substantially planar first top surface of a first active area, the contact between and in contact with a first alignment spacer and a second alignment spacer both having substantially vertical outer surfaces. The contact formed between the first alignment spacer and the second alignment spacer has a more desired contact shape then a contact formed between alignment spacers that do not have substantially vertical outer surfaces. The substantially planar surface of the first active area is indicative of a substantially undamaged structure of the first active area as compared to an active area that is not substantially planar. The substantially undamaged first active area has a greater contact area for the contact and a lower contact resistance as compared to a damaged first active area.

Abstract: A magnetic device comprising a magnetic body, a coil disposed in the magnetic body and at least one thermal conductive layer, wherein a first portion of the at least one thermal conductive layer encapsulates at least one portion of the coil and a second portion of the at least one thermal conductive layer is exposed from the magnetic body, wherein the at least one thermal conductive layer forms a continuous thermal conductive path from the coil to the outside of the magnetic body for dissipating heat generated from the coil.

Abstract: An image capture apparatus is illustrated, which has an image capture element and an optical component layer. The image capture element has a plurality of pixel regions. The optical component layer comprises a microstructure layer and a spatial filter formed on the image capture element in a first direction. The microstructure layer has micro lenses formed on a surface of the microstructure layer. The spatial filter has at least one translucent substrate and at least one light shielding structure, and the light shielding structure has a light absorbing/reflective layer and a reflective layer in the first direction stacked to each other. The light absorbing/reflective layer is another one light reflective layer or a light absorbing layer.

Abstract: A computer system may generate alerts related to a potential cyber attack an resource of an organization. The computer system may receive activity information associated with activity on a computer network of the organization, access contextual information about the resource, determine, based on the contextual information, select, based at least in part on the contextual information, one or more indicators that are indicative of a cyber attack against the resource to form a second plurality of indicators, and generate, based at least in part on the second plurality of indicators and the contextual information, a risk score, wherein the risk score indicates a probability that the resource is at risk of a cyber attack. In response to the risk score satisfying a threshold value, the computer system may generate an alert. Alerts may be presented using a graphical user interface. Analysts' actions may be tracked for review.

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate and forming a bottom layer, a middle layer, and a top layer on the substrate. The method also includes patterning the top layer to form a patterned top layer and patterning the middle layer by a patterning process including a plasma process to form a patterned middle layer. The plasma process is performed by using a mixed gas including hydrogen gas (H2). The method further includes controlling a flow rate of the hydrogen gas (H2) to improve an etching selectivity of the middle layer to the top layer, and the patterned middle layer includes a first portion and a second portion parallel to the first portion, and a pitch is between the first portion and the second portion.

Abstract: A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.

Abstract: A damping structure configured for connecting a gimbal with a carrier includes a first connecting member connectable with the gimbal, a second connecting member connectable with the carrier, and a damper elastically disposed between the first connecting member and the second connecting member. The damper includes a damper body, a first fixed portion, and a second fixed portion. The first fixed portion and the second fixed portion are configured to connect with two opposite sides of the damper body, respectively. The first fixed portion includes an elastic ring sleeve configured to sleeve couple with the first connecting member. The second fixed portion is connected with the second connecting member.

Abstract: A battery module for use in a battery system is operable in a bottom mode, a top mode or a middle mode during an enabled state. The battery module includes a battery unit and a battery control circuit. The battery unit which includes at least one battery generates a battery unit voltage between a positive terminal and a negative terminal of the battery unit. The battery control circuit is powered by the battery unit voltage and is configured to control the battery unit. The battery control circuit includes an enable terminal, an upstream input terminal, an upstream output terminal, a downstream input terminal, and a downstream output terminal. When the enable terminal is at an operation enabling level, or when the upstream input terminal is at an upstream enabling level, the battery module enters the enabled state.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.

Abstract: A display device and a driving method thereof are disclosed. The display device includes a display panel, a processor and a driver; the driver includes a buffer; time for displaying one frame image includes display time and black insertion time. The driving method of the display device includes: outputting data for displaying one frame image which includes first subdata by the processor, and transmitting the first subdata to the buffer by the processor within the display time; and bufferring the first subdata by the buffer within the display time, and transmitting the first subdata to the display panel by the buffer within the black insertion time.

Abstract: A multi-processor system handles interrupts using a power and performance status of each processor and a usage scenario of each processor. The power and performance status is indicated by factors that affect power consumption and processor performance. The system identifies one of the processors for handling an interrupt based on a weighted combination of the factors. Each factor is weighted based on a usage scenario for which the interrupt was generated. The system then dispatches the interrupt to the identified one of the processors.

Abstract: Memories are provided. A memory includes a first memory array, a second memory array, and a read circuit. The first memory array is configured to store main data. The second memory array is configured to store complement data that is complementary to the main data. The read circuit includes a first sense amplifier, a second sense amplifier and an output buffer. The first sense amplifier is configured to provide a first sensing signal according to a reference signal and first data of the main data corresponding to a first address signal. The second sense amplifier is configured to provide a second sensing signal according to the reference signal and second data of the complement data corresponding to the first address signal. The output buffer is configured to provide one of the first sensing signal and the second sensing signal as an output according to a control signal.

Abstract: Image sensor structures are provided. The image sensor structure includes a substrate having a front side and a backside and a light-sensing region formed in the substrate. The image sensor structure further includes a front side isolation structure surrounding the light sensing region and having an opening region in a top view and a backside isolation structure formed at the backside of the substrate and encompassing the light-sensing region and vertically overlapping the opening region. The image sensor structure further includes a first gate structure formed over the front side of the substrate and overlapping the opening region and the front side isolation structure and a storage node in the substrate adjacent to the first gate structure. In addition, the storage node extends into the opening region.

Abstract: A power supply structure comprises a housing, a socket and a fan. The housing has a main housing, a terminal housing and a front panel, wherein the terminal housing connected with the main housing. The fan and the terminal housing disposed on one end of the main housing, and the fan attached to the front panel. The socket arranged in parallel with the fan and connected to the terminal housing.

Abstract: A pre-charge circuit of a static random access memory (SRAM) controller and a pre-charging method thereof are provided. The pre-charge circuit of the SRAM controller includes a first switch, a second switch and a third switch. A first terminal of the first switch is coupled to a working voltage, a second terminal of the first switch is coupled to a first bit line of the SRAM controller, and the first switch is controlled by a first turn-on signal. A first terminal of the second switch is coupled to the working voltage, a second terminal of the second switch is coupled to a second bit line of the SRAM controller, and the second switch is controlled by a second turn-on signal. The third switch is coupled between the first bit line and the second bit line, and the third switch is controlled by a third turn-on signal.

Abstract: A blockchain-based transaction processing method may comprise: in response to a designated account being logged in through an application client, generating, according to input to-be-operated account information and configured operation content, an operation instruction comprising the to-be-operated account information and the operation content; and sending the operation instruction to a node in a blockchain network, causing the node in the blockchain network to invoke a smart contract corresponding to the designated account upon receiving the operation instruction, and to execute an operation according to the operation content on another account corresponding to the to-be-operated account information.

Abstract: Aspects of the disclosure relate to implied and explicit mapping of uplink (UL) resources for acknowledgment communications from a user equipment (UE). In some examples disclosed herein, implied mapping may include indexing of information elements in a downlink (DL) communication. The explicit mapping may include information elements in the DL communication configured to explicitly provide a location of an UL resource. Other aspects, embodiments, and features are also claimed and described.

Abstract: Provided herein are compounds useful for the treatment of cancer.